3D Vertical Spiral Inductor Layout Without EMI Shielding
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Solution Overview
Problem
Conventional spiral inductor designs require shielding and a 'keep out zone' to mitigate electromagnetic interference, which complicates device manufacturing and increases costs.
Innovation Solution
The design of a vertically oriented 3D spiral inductor with multiple dielectric and conductive layers, along with vias, eliminates the need for shielding by reducing electromagnetic interference, allowing for a more compact and efficient inductor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional planar spiral inductor design is used, then the inductor can be manufactured with standard processes, but electromagnetic interference requires shielding and keep out zones that complicate device manufacturing and increase costs
Solution Approach 1:
The patent transitions from a conventional planar (2D) spiral inductor design to a three-dimensional vertical spiral inductor design. The inductor windings are arranged in multiple stacked layers with vertical connections via vias, creating a 3D structure that achieves higher inductance density without requiring additional lateral shielding structures. This dimensional transformation eliminates the need for complex keep out zones while maintaining manufacturability through standard semiconductor fabrication processes.
2Ease of manufacture
If conventional planar spiral inductor design is used, then the structure is simple to fabricate, but electromagnetic interference increases requiring additional shielding components
Solution Approach 1:
The patent employs a three-dimensional vertical spiral configuration where inductor windings are stacked in multiple layers (e.g., first layer, second layer, third layer) with vertical vias connecting them. This 3D arrangement concentrates the magnetic flux vertically, reducing lateral electromagnetic interference that would otherwise require shielding. The fabrication remains simple as it uses standard semiconductor processes including multiple deposition layers and via formation.
Solution Approach 2:
The patent implements nested spiral structures where inner and outer spiral windings are positioned in different vertical layers. The inner spiral of one layer is nested within the outer spiral of the same or adjacent layers, creating a compact multi-layer configuration. This nesting approach maximizes inductance within a small footprint while the vertical stacking reduces electromagnetic coupling between adjacent structures, eliminating the need for additional shielding.
3Reliability
If more windings are added to increase inductance value, then the inductance increases, but the device area and resistance increase
Solution Approach 1:
The patent achieves high inductance values by stacking multiple spiral winding layers vertically (e.g., 3-5 layers) rather than expanding laterally. Each layer contributes to the total inductance while the vertical arrangement allows dense packing of windings. This 3D configuration provides high inductance density (inductance per unit area) because the magnetic flux paths are concentrated vertically, enabling small footprint devices with high inductance values suitable for mobile applications.
Solution Approach 2:
The patent uses composite conductor structures combining multiple metal layers (e.g., copper or aluminum) separated by dielectric materials. The multi-layer conductor stack provides both high inductance and low resistance because the vertical stacking reduces the effective current path length and allows optimized conductor cross-sections. The composite structure of conductive layers, dielectric spacers, and via interconnects creates an efficient electromagnetic structure that achieves high Q-factor in small areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quality factor (Q) and reduces resistance, eliminating the need for shielding and 'keep out zones, thereby simplifying manufacturing and improving performance.
Implementation Method 1
The design of a vertically oriented 3D spiral inductor with multiple dielectric and conductive layers, along with vias, eliminates the need for shielding by reducing electromagnetic interference
Implementation Method 2
a first spiral coil arranged in a first plane perpendicular to the substrate, where the first spiral coil is formed of first portions of the plurality of conductive layers and a first set of vias of the plurality of vias, configured to connect the first portions of the plurality of conductive layers
Data Source
AI summary
Disclosed is apparatus including a vertical spiral inductor. The vertical spiral inductor may include a plurality of dielectric layers formed on a substrate, a plurality of conductive layers, each of the plurality of conductive layers disposed on each of the plurality of dielectric layers, a plurality of insulating layers, each of the plurality of insulating layers disposed on each of the plurality of conductive layers, wherein each of the plurality of insulating layers separates each of the plurality of dielectric layers. A first spiral coil is arranged in a first plane perpendicular to the substrate, where the first spiral coil is formed of first portions of the plurality of conductive layers and a first set of vias of a plurality of vias, configured to connect the first portions of the plurality of conductive layers.