Solid-State Devices TRIZ Cases

A light blocking member on the connecting member suppresses light leakage, improving contrast and black gradation without narrowing viewing angle.

A shared gate pitch and interface region connect HD and HP standard cell blocks, balancing integration density with operating speed.

A selective germanium or silicon-germanium assistant layer cuts capacitor contact resistance and expands overlay margin in scaled semiconductor fabrication.

Phosphor conversion and color filters let LED arrays keep color consistent across viewing angles while reducing pixilation and red LED cost.

Mixed octagon, square, yellow, and NIR pixels improve low-light color accuracy by boosting light capture and limiting NIR interference.

A thicker amorphous silicon channel boosts photo-generated carriers, improving light response and fingerprint or palmprint recognition.

An amine-based planarization layer flattens metal particle defects in OLED electrodes, reducing electric-field weak points, dark spots, and shorts.

A thinner reflecting layer in a higher-transmittance display region lets under-display sensors receive light without sacrificing full-screen appearance.

A stepped reflective resin layer with a protruded contact region reflects side-emitted LED light to increase luminous flux while limiting thermal resistance.

Segmented grid lines between color filters block stray light, improving phase detection while limiting crosstalk and power use.

A vertical multilayer spiral inductor cuts electromagnetic interference, removes shielding and keep-out zones, and improves Q with lower resistance.

Selective LED exposure releases chosen microdevices and cures bonding layers for precise transfer with less light leakage and misalignment.

A shared semiconductor electrode layer links adjacent μLEDs to cut aspect ratio, prevent tilting during mass transfer, and simplify fabrication.

A patterned photo absorption layer reduces flare noise while limiting bonding-structure stress that can cause surface peeling.

A voltage-controlled floating diffusion adjusts capacitance in CCD image sensors to preserve weak-signal sensitivity while extending maximum detectable signal.

Correlated double sampling is moved ahead of pixel arithmetic in a stacked image sensor to remove noise without adding chip area.

An RC-timed trigger circuit turns an ESD protection switch on during a surge, then releases the gate to float for normal operation.

Side electrodes and contact-hole barrier walls improve DEP force uniformity and electrical contact, raising micro-LED lighting rate.

Thickness thinning regions in the pixel defining layer guide low-fluidity fillers for more uniform OLED encapsulation and longer device life.

Pre-applied adhesive lets laser transfer place and bond electronic components in one step, cutting process complexity and improving yield.

Microlenses and opaque-layer openings create compact optical channels that shrink fingerprint sensor area while preserving wide-angle light capture.

Segmented hole injection blocks on each anode stop lateral conduction between OLED sub-pixels, reducing crosstalk without added process steps.

A low-conductivity glass spacer between ASIC and DRAM dies limits heat transfer and keeps stacked IC packages operating reliably.

A high-k metal-containing liner in the element separation sidewall improves gate control and suppresses short channel effects in scaled transistors.

Rotating dicing 13°-17° from <110> suppresses slip defects in compound semiconductor detector tiles, cutting edge chipping and surface currents.

A graphene separating layer enables clean peeling of etched LED rods, creating flat end surfaces that prevent electrode open and short circuits.

A CMOS pinned-photodiode transfer structure enables unidirectional TDI charge summing with low-noise readout using standard voltages and fabrication.

Thixotropic molding around PCB-mounted LED chips improves backlight light extraction, reduces Mura, and supports thinner LCD modules.

A copolymer-based resist underlayer improves reflow, fills irregular patterns, and forms flat antireflective films on multi-level substrates.

By relocating transistors into previously unused cell regions, this IC layout cuts pitch and footprint through N-PPNN-P dopant stacking.

Extending the ferroelectric layer through stacked dielectric layers boosts orthorhombic phase content, improving memory window and reliability.

Segmented semiconductor and matched electrode patterns reduce transferred micro-LED particles, improving transfer stability, accuracy, and pixel uniformity.

A clipped reset transistor and optimized insulating layers cut kTC noise and widen dynamic range in laminated imaging pixels.

An insulating AlGaN segment built into wire LEDs blocks substrate and sidewall current leaks while removing separate isolation and passivation steps.

A layered light extraction structure uses total internal reflection and a metal sidewall to boost front-view LED output and cut power use.

Light pipes, surface recesses, and deep trench isolation improve long- and short-wavelength absorption in BSI image sensors.

Stacked conductive and organic layers raise storage capacitance, improve voltage uniformity, and add light shielding in small-pixel displays.

Optical bump patterns and a higher-index planarization layer reshape emission angles to reduce color shift and improve off-axis luminance uniformity.

Segmented color filter arrays and a filtering layer suppress optical black flare and coating striation while preserving image sensor sensitivity.

A transflective reflector region lets a rear sensor receive light while closely matching the surrounding reflective surface in color and reflectance.

Angled sidewalls, a mirror, and low-index layers redirect trapped micro-LED light through the output facet to boost extraction.

Connected micro LED sets with thinner link parts allow sub-pixel replacement while preserving display resolution and lowering repair cost.

Angled TFT conductive patterns cut gate-drain parasitic capacitance, reducing feed-through effect and LCD image flicker.

Alternating I/O pads across bonding channels cut cross-talk, improve signal integrity, and reduce shielding pad area in stacked memory packages.

Expandable film transfer spaces LED pixels for precise sidewall and wavelength-conversion layer placement, improving optical isolation and emission control.

A trench isolation layout with conductive gate straps expands active region height and area without shrinking rails, metals, or contacts.

Vertical standing parts embedded in the resin frame enlarge the lead-frame interface, improving adhesion and reducing detachment or disconnection.

A stacked dual MIM capacitor shares a common plate to raise capacitance per unit area without extra masks or high-k materials.

A transparent sidewall-and-ceiling protection film blocks moisture and impurities in CMOS image sensors while preserving optics and reducing dark current.

Multiple low-impedance power paths disperse sensor current to cut magnetic field noise, improving image quality and lowering consumption.