3D-Stacked Gate Structure Using Poly-Si to Protect Work-Function Metal
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Solution Overview
Problem
The existing process of forming different work-function metal layers in multi-stack semiconductor devices is challenging due to the risk of damaging the lower work-function metal layer during the wet etching of the upper-stack nanosheet channel layers, especially when the channel widths of the lower and upper stack nanosheet transistors differ, requiring additional complex patterning and deposition steps to protect the lower work-function metal layer.
Innovation Solution
Incorporating a polycrystalline silicon (poly-Si) layer between the lower and upper work-function metal layers, with the lower gate electrode formed of poly-Si or poly-Si including a dopant, and the upper gate electrode formed of a metal or metal compound, and optionally using a gate inner spacer to protect the lower work-function metal layer, allowing for selective etching and preventing damage during the formation of the upper work-function metal layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wet etching is used to remove the work-function metal layer from upper-stack nanosheet channel layers, then the upper work-function metal layer can be selectively removed, but the lower work-function metal layer may be etched or damaged
Solution Approach 1:
A polycrystalline silicon layer is introduced as an intermediary protective layer between the lower and upper work-function metal layers. This poly-Si layer acts as a sacrificial barrier that protects the lower work-function metal layer from wet etching damage while allowing selective removal of the upper work-function metal layer through the etch process
2Reliability
If additional patterning and deposition steps are added to protect the lower work-function metal layer, then the lower work-function metal layer can be protected from etching, but the manufacturing process complexity increases
Solution Approach 1:
The polycrystalline silicon layer serves multiple functions simultaneously: it acts as a gate electrode material, provides protection to the lower work-function metal layer during wet etching, and enables selective removal of the upper work-function metal layer. By combining these functions into a single layer, the need for additional separate protection steps is eliminated, simplifying the overall manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents damage to the lower work-function metal layer during the etching process, simplifies the manufacturing process, and ensures the formation of distinct threshold voltages for the lower and upper nanosheet transistors, enhancing the reliability and efficiency of the multi-stack semiconductor device production.
Implementation Method 1
during the removal operation of the work-function metal layer initially formed on the upper-stack nanosheet channel layers through wet etching
Implementation Method 2
polycrystalline silicon (poly-Si) including a dopant
Data Source
Figure 1A~1B
Figure 1C~1D
Figure 1E
AI summary
Provided is a multi-stack semiconductor device that includes: a substrate (105); a lower field-effect transistor in which a lower channel structure (110) is surrounded by a lower gate structure including a lower work-function metal layer (115F) and a lower gate electrode (115P); and an upper field-effect transistor in which an upper channel structure (120) is surrounded by an upper gate structure including an upper work-function metal layer (125F) and an upper gate electrode (125M), wherein the lower gate electrode comprises polycrystalline silicon (poly-Si) or poly-Si comprising a dopant, and the upper gate electrode comprises a metal or a metal compound.