3D Stacked Package Structure with Through-Frame Conductors
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Solution Overview
Problem
The increasing integration density of chip circuits and decreasing area of pads and metal wires in integrated circuits require advanced stacked package technologies to adapt to miniaturization, necessitating improved methods for stacking and electrical connection of chips and substrates to achieve high-density memory solutions.
Innovation Solution
A 3D stacked package structure and manufacturing method involving a first unit with a substrate and electronic components, a molding unit with a top portion, frame, and connections, and a conductive unit with conductors passing through the frame to enable electrical connection between units, allowing for convenient stacking and reduced manufacturing costs through simplified processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional stacked package technology is used, then chip density can be increased, but the area for conductive lines decreases and manufacturing complexity increases
Solution Approach 1:
The patent transitions from planar 2D packaging to three-dimensional 3D stacked packaging, enabling vertical stacking of multiple chip units. This dimensional change allows conductive connections to extend through the Z-axis via conductors passing through the frame, rather than being constrained to the XY-plane, thereby increasing chip density while maintaining adequate conductive line area through spatial redistribution.
2Quantity of substance
If more chips are stacked to increase density, then manufacturing process complexity increases, but the need for miniaturization drives further stacking
Solution Approach 1:
The patent divides the package structure into modular units, each comprising a substrate, electronic components, and associated conductive elements. The frame is segmented with multiple openings for conductors, and the overall structure is divided into stackable layers. This segmentation enables standardized manufacturing of individual units that can be assembled through repetitive stacking, reducing overall manufacturing complexity despite increased density.
Solution Approach 2:
The molding unit and conductive unit are pre-formed with integrated frames and conductor pathways before final assembly. The frame is prepared in advance with openings positioned to receive conductors, and the substrate units are pre-assembled with electronic components. This preliminary preparation of sub-components simplifies the final stacking and connection process, managing manufacturing complexity while enabling high-density stacking.
3Quantity of substance
If the area of pads and metal wires is reduced for miniaturization, then integration density increases, but electrical connection reliability becomes more challenging
Solution Approach 1:
The patent implements a nested structure where conductors pass through the frame and connect to conductive pads on substrates. The frame acts as a protective enclosure that houses and protects the conductors, while the conductive pads are nested on the substrate surfaces. This nested arrangement protects the electrical connections from external damage and environmental factors, maintaining reliability even as connection areas are reduced for miniaturization.
Data Source
AI summary
A 3D stacked package structure includes a first unit, a molding unit, a conductive unit and a second unit. The first unit includes a first substrate and at least one first electronic component, and the first substrate has at least one runner and at least one first conductive pad. The molding unit includes a top portion, a frame, and at least one connection connected between the top portion and the frame. The conductive unit includes at least one conductor passing through the frame and electrically connected to the first conductive pad. Therefore, the first unit can be stacked on the second unit through the frame of the molding unit, and the first unit can be electrically connected to the second unit through the conductor of the conductive unit.