3D Stacked Synaptic Modules With Interlayer Decoders
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Solution Overview
Problem
Current neuromorphic processors with 3D stacked synaptic structures face challenges in efficiently accessing and selecting memristers due to complex decoder circuits and potential degradation of memory cell characteristics, especially when stacked multiple layers, leading to increased area requirements and reduced integrity.
Innovation Solution
A neuromorphic apparatus with a 3D stacked synaptic structure that includes a plurality of unit synaptic modules, each with interlayer decoders between synaptic layers, and a level selection signal and address generation mechanism to access memristers, utilizing symmetrical stack structures and decoders to simplify the decoder circuit and reduce area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex decoder circuits are used to access and select memristers in 3D stacked synaptic structures, then memory cell characteristics can be maintained, but decoder circuit complexity increases and area requirements increase
Solution Approach 1:
The decoder circuit is segmented into multiple levels: a first decoder located in a first substrate that decodes row addresses, and a second decoder located in a second substrate that decodes column addresses. This segmentation distributes the decoding functionality across different substrates, reducing the complexity of individual decoder circuits while maintaining the ability to access and select memory cells in the 3D stacked synaptic structure.
Solution Approach 2:
Interlayer decoders are introduced as intermediary components between the first and second substrates. These interlayer decoders receive decoded signals from the first decoder and generate control signals for the second decoder, acting as a mediator that simplifies the overall decoding process and reduces the complexity of direct decoder-circuit interactions in the 3D stacked structure.
2Reliability
If complex decoder circuits are used to access and select memristers in 3D stacked synaptic structures, then memory cell characteristics can be maintained, but area requirements increase
Solution Approach 1:
The decoder functionality is segmented across multiple substrates, with the first decoder occupying area in the first substrate and the second decoder occupying area in the second substrate. This segmentation distributes the area requirements across different physical locations, reducing the concentrated area demand in any single location and enabling more efficient space utilization in the 3D stacked synaptic structure.
3Quantity of substance
If multiple layers are stacked to increase memory capacity, then storage density improves, but decoder circuit complexity and area requirements increase
Solution Approach 1:
The patent transitions from a two-dimensional decoder architecture to a three-dimensional decoder architecture that matches the 3D stacked synaptic structure. By placing decoders in different vertical layers (first substrate and second substrate) and using interlayer decoders to coordinate between layers, the system efficiently manages memory capacity across multiple stacked layers without proportionally increasing decoder circuit complexity.
Data Source
AI summary
A neuromorphic apparatus includes a three-dimensionally-stacked synaptic structure, and includes a plurality of unit synaptic modules, each of the plurality of unit synaptic modules including a plurality of synaptic layers, each of the plurality of synaptic layers including a plurality of stacked layers, and each of the plurality of unit synaptic modules further including a first decoder interposed between two among the plurality of synaptic layers. The neuromorphic apparatus further includes a second decoder that provides a level selection signal to the first decoder included in one among the plurality of unit synaptic modules to be accessed, and a third decoder that generates an address of one among a plurality of memristers to be accessed in a memrister array of one among the plurality of synaptic layers included in the one among the plurality of unit synaptic modules to be accessed.