3D Transfer Transistor for CMOS Image Sensor Drivability
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Solution Overview
Problem
The existing CMOS image sensors face a trade-off between reducing the size of transfer structures and maintaining drivability, leading to degraded transfer efficiency of photocharges due to the 2-dimensional structure of transfer transistors, which results in image lag and reduced display resolution.
Innovation Solution
The implementation of a 3-dimensional transfer transistor structure with a transfer gate electrode covering the sidewalls and upper portion of the second active region, along with a protruding photodiode, to enhance the effective channel width and improve photocharge transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the transfer gate structure is enlarged to increase the effective channel width for better drivability, then the drivability of the transfer transistor is improved, but the size of the pixel structure increases
Solution Approach 1:
The patent transitions from a conventional 2-dimensional planar transfer gate structure to a 3-dimensional structure where the transfer gate electrode extends vertically along the sidewalls of the active region. This dimensional change allows the effective channel width to be increased without proportionally increasing the planar footprint, thereby improving drivability while controlling pixel size.
2Area of stationary object
If the transfer gate structure is reduced in size to achieve high integration, then the pixel size is reduced for higher integration density, but the drivability of the transfer transistor deteriorates
Solution Approach 1:
By extending the transfer gate electrode vertically along the sidewalls of the active region, the patent increases the effective channel width in the vertical dimension. This allows the planar dimensions to be reduced for high integration while maintaining or improving drivability through the enhanced vertical channel area.
3Ease of manufacture
If a conventional 2-dimensional transfer gate structure is used, then the manufacturing process is simple, but the transfer efficiency of photocharges is degraded leading to image lag
Solution Approach 1:
The patent introduces a vertical component to the transfer gate electrode, extending it along the sidewalls of the active region. This 3-dimensional configuration increases the effective channel width and improves photocharge transfer efficiency, reducing image lag, while remaining compatible with standard semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances the transfer efficiency of photocharges by widening the effective channel, thereby improving the resolution and reducing image lag in CMOS image sensors.
Implementation Method 1
The photodiode PD serves to convert incident light into an electric signal
Data Source
AI summary
In an embodiment, an image sensor includes an isolation layer disposed in a semiconductor substrate to define a first active region and a second active region extending from the first active region. A photodiode is disposed in a portion of the first active region. A floating diffusion region is provided in the second active region at a position spaced apart from the photodiode. A transfer gate electrode is disposed on the second active region between the photodiode and the floating diffusion region. The transfer gate electrode is disposed to cover both sidewalls and an upper portion of the second active region. The transfer gate electrode has a region extending onto the first active region and overlapping the photodiode. The photodiode has a protrusion into the second active region at the portion adjacent to the transfer gate electrode. A deep n-impurity region of the photodiode extends in the protrusion.