3D Vertex Rendering on 32-bit RISC Processors Without FPU

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Solution Overview

Problem

Processing 3D graphics on devices with limited computational resources, such as 32-bit load-store architecture processors without a floating-point processing unit (FPU), is challenging due to the high processing requirements for transforming 3D vertex data into 2D space, making it difficult to render 3D graphics on mobile devices or those with limited processor capabilities.

Innovation Solution

A method and device for rendering 3D vertex data using integer-based arithmetic on a 32-bit load-store architecture processor, which involves constraining vertex coordinates and transformation matrix values to fit within 32-bit limits, culling vertices outside the maximum coordinate range, and subdividing connections to ensure all calculations can be performed within the processor's capabilities, allowing for efficient rendering to a 2D viewport.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If standard 3D vertex transformation methods are used on a 32-bit processor without FPU, then the processor cannot perform the required floating-point calculations, but the patent applies integer-based arithmetic with constrained coordinate ranges to enable processing

Engineering Contradiction:
Improveprocessor compatibilityVSAvoidcoordinate precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent changes the parameter type from floating-point to integer arithmetic and constrains the coordinate range to -2^15 to +2^15. This allows 3D vertex transformation to be performed on 32-bit processors without FPU by using integer-based calculations with limited coordinate ranges, enabling processor compatibility while maintaining sufficient precision for mobile displays

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the 3D processing into distinct stages: vertex subdivision to ensure connections meet maximum length constraints, culling of vertices outside the visible frustum, and transformation of remaining vertices. This segmentation allows complex 3D processing to be broken down into manageable integer-based operations suitable for constrained processors

Inventive Principle:
Principle #1Segmentation

2Productivity

If vertex coordinates are constrained to fit within 32-bit integer limits, then processing can be performed on limited processors, but the coordinate range is reduced

Engineering Contradiction:
Improveprocessing speedVSAvoidcoordinate range
Core Design Contradiction:
ProductivityVSLength of stationary object

Solution Approach 1:

The patent performs preliminary vertex subdivision before transformation, ensuring all vertex connections meet the maximum length constraint of 2^15. By pre-processing the geometry to fit within integer constraints, the subsequent transformation and rendering can proceed efficiently on 32-bit processors without requiring floating-point arithmetic

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a new dimensional constraint by limiting the coordinate range to -2^15 to +2^15 along each axis. This dimensional constraint enables integer-based processing on 32-bit processors while the culling stage removes vertices outside the visible frustum, effectively managing the reduced coordinate space

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If all vertices are processed for rendering, then complete scene coverage is achieved, but processing time increases significantly on limited processors

Engineering Contradiction:
Improverendering completenessVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and removes vertices that fall outside the visible frustum defined by the camera position and orientation. By culling vertices before transformation and rendering, the system processes only the necessary subset of vertices that will contribute to the final image, significantly reducing processing time on 32-bit processors while maintaining rendering completeness for visible geometry

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial processing by performing full subdivision and constraint validation on all vertices, but only completing the transformation and rendering steps for vertices within the visible range. This partial action approach ensures geometric integrity while optimizing performance by avoiding unnecessary processing of invisible vertices

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8817074B2Method of calculating 3D object data within controllable constraints for fast software processing on 32 bit RISC CPUS
Publication Date: 2014.08.26 WARNERMEDIA DIRECT LLC
  • US8817074B2 patent drawing
  • US8817074B2 patent drawing
  • US8817074B2 patent drawing

AI summary

Systems and methods are described to allow arbitrary 3D data to be rendered to a 2D viewport on a device with limited processing capabilities. 3D vertex data is received comprising vertices and connections conforming to coordinate processing constraints. A position and orientation of a camera in world co-ordinates is received to render the 3D vertex data from. A processing zone of the plurality of processing zones the position of the camera is in is determined. The vertices of the 3D vertex data assigned to the determined processing zone are transformed based on the position and orientation of the camera for rendering to the viewport.