AC-Coupled Buffer With Variable Feedback for Fast Duty Cycle Recovery
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Solution Overview
Problem
Existing AC-coupled buffers in computing devices face challenges in duty cycle recovery time, particularly at high frequencies, leading to reduced performance in burst mode operations and limited frequency range due to disturbances in self-bias voltage.
Innovation Solution
Implementing a variable-impedance feedback element between the input and output nodes of an inverter-based amplifier, using diode-connected transistors or transmission gates, to stabilize the duty cycle and enable a wide frequency range without additional power consumption or area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed-impedance feedback circuit is used in an AC-coupled buffer, then the circuit structure is simple, but the duty cycle recovery time is long and frequency range is limited
Solution Approach 1:
The feedback impedance is made variable rather than fixed. The circuit dynamically adjusts the feedback impedance based on the operating conditions and frequency of the clock signal. This is achieved by using switches controlled by control signals to connect different feedback paths with different impedances, allowing the buffer to adapt to different frequency ranges and reduce duty cycle recovery time across a wide bandwidth.
Solution Approach 2:
The feedback impedance parameter is changed based on operating conditions. The circuit selectively connects different feedback paths with different impedance values to optimize performance at different frequencies. This parameter adaptation allows the buffer to maintain low duty cycle recovery time across an ultra-wide frequency range from 200 MHz to 10 GHz.
2Loss of time
If the feedback impedance is reduced to shorten duty cycle recovery time, then duty cycle recovery improves, but the frequency range and burst mode performance deteriorate
Solution Approach 1:
The feedback impedance is made dynamically adjustable rather than fixed at a low value. The circuit uses control signals to selectively activate different feedback paths with different impedance values. This allows the impedance to be high for low-frequency signals (maintaining frequency response) and low for high-frequency signals (reducing duty cycle recovery time), thus resolving the contradiction between recovery speed and frequency range.
Solution Approach 2:
The feedback path is segmented into multiple parallel paths, each with different impedance characteristics. Switches control which path is active based on the input signal frequency. This segmentation allows the circuit to optimize for different frequency ranges independently, achieving both fast duty cycle recovery at high frequencies and good performance at low frequencies.
3Loss of time
If additional circuit elements are added to improve duty cycle recovery, then performance improves, but power consumption and area increase
Solution Approach 1:
The circuit uses the existing clock signal and its derivatives as control signals to automatically select the appropriate feedback path. The buffer essentially controls itself by detecting the signal characteristics and adjusting its own feedback impedance accordingly, without requiring external control circuitry. This self-service approach achieves fast duty cycle recovery without adding significant power-consuming control logic.
Solution Approach 2:
The control signals used to switch between feedback paths are derived from the same clock signal that the buffer is processing. This multi-functional use of the clock signal (both as input and as control) eliminates the need for separate control circuits, reducing additional power consumption and area while achieving improved duty cycle recovery.
Data Source
AI summary
Embodiments herein relate to an alternating-current (AC)-coupled buffer in the path of a clock signal which can accommodate a wide range of clock frequencies while reducing duty cycle settling time and without increasing power consumption or area. The AC-coupled buffer includes a variable-impedance feedback element coupled between the input and output nodes of a complementary metal-oxide semiconductor (CMOS) inverter. The variable-impedance feedback element can include first and second diode-connected transistors.