Hardware Accelerator Sleep-Polling to Cut CPU Cycle Waste
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Solution Overview
Problem
The continuous polling method used by host CPUs to monitor hardware accelerators consumes CPU cycles, affecting the performance of the entire system and other running programs.
Innovation Solution
A method and apparatus that set a delay time for task performance, switch to a sleep state during this time, and poll the hardware accelerator state after the delay, minimizing unnecessary polling operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the host CPU continuously polls the state register of the hardware accelerator to monitor task completion, then the CPU can quickly detect state changes and perform accelerator manipulation, but the CPU consumes excessive cycles and affects the performance of the entire system and other running programs
Solution Approach 1:
The patent implements periodic polling with dynamically adjusted intervals. The CPU polls the hardware accelerator state register at regular intervals rather than continuously, allowing the CPU to sleep between polling cycles. This reduces CPU cycle consumption while still detecting state changes reliably. The polling interval can be adjusted based on task characteristics and accelerator performance.
Solution Approach 2:
The patent uses interrupt mechanisms and event-driven notifications where the hardware accelerator proactively notifies the CPU when state changes occur, rather than waiting for the CPU to poll. This preliminary action allows the CPU to remain in sleep state until actually needed, significantly reducing unnecessary polling operations while maintaining reliable state detection.
2Ease of operation
If the host CPU uses a polling method to check the current state of the accelerator, then the CPU can simply and quickly check the state, but unnecessary polling operations consume CPU cycles and affect pre/post processing performance
Solution Approach 1:
The system implements periodic polling with optimized intervals that balance simplicity of implementation with energy efficiency. By polling at regular intervals rather than continuously, the CPU maintains simple operation logic while reducing cycle consumption during the delay period when the accelerator is processing tasks.
Solution Approach 2:
The hardware accelerator autonomously manages its own state reporting through interrupt mechanisms, reducing the burden on the CPU to continuously query state information. The accelerator serves itself by generating notifications when state changes occur, allowing the CPU to simplify its polling operations.
3Productivity
If the CPU performs multiple tasks simultaneously in a multitasking environment, then the system can maintain high productivity, but the polling method for hardware accelerator monitoring degrades overall system performance
Solution Approach 1:
By implementing periodic polling with extended intervals during accelerator processing, the CPU frees up cycles to perform other multitasking operations. The polling occurs at predetermined intervals rather than continuously, allowing the CPU to switch to other tasks during the delay period while still monitoring the accelerator state reliably.
Solution Approach 2:
The system uses feedback mechanisms where the hardware accelerator provides state information back to the CPU through interrupts or completion queues. This feedback loop allows the CPU to maintain multitasking capability while receiving timely notifications about accelerator state changes without requiring continuous active polling.
Data Source
AI summary
Disclosed are a method and apparatus for controlling a hardware accelerator. The method includes setting a delay time related to task performance of a specific hardware accelerator, switching to a sleep state during the set delay time from a request time point when making a request, to a central processing unit (CPU), for requesting the specific hardware accelerator to accelerate a task, polling the state of the specific hardware accelerator to the CPU by switching from the sleep state to an operating state after the delay time, not polling a state of the specific hardware accelerator to the CPU during the delay time when switching to the sleep state, and receiving result information corresponding to the polling from the CPU in response to the polling.