Access Line Grain Modulation via Barrier Planarization
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Solution Overview
Problem
The topography of memory device components, such as undulating surfaces, can impact the electrical behavior of access lines, leading to variations in resistivity and current delivery, which affects the performance and reliability of memory devices.
Innovation Solution
Planarizing the top surface of barrier materials before forming metal layers in memory cell stacks to reduce undulations and increase grain size, thereby improving the uniformity and predictability of access line behavior.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If barrier material is deposited conformally over memory cell stacks with undulating surfaces, then the barrier material conforms to the topography, but the top surface of the barrier material becomes undulating, causing non-planar propagation to upper layers
Solution Approach 1:
The patent applies preliminary planarization to the barrier material top surface before depositing the metal access line layer. This preliminary action removes undulations from the barrier material surface, ensuring a planar surface that prevents non-planar propagation to upper layers and eliminates the need for complex etch steps later in the process.
2Reliability
If the barrier material top surface is left undulating, then the fabrication process is simpler, but the access line grain size is reduced and resistivity increases
Solution Approach 1:
The planarization step is performed as a preliminary action before metal layer deposition. This creates a planar barrier material surface that enables large grain size in the access line metal layer, resulting in lower resistivity and improved reliability, while the process remains relatively simple.
3Manufacturing precision
If planarization is applied to the barrier material top surface, then access line grain size increases and resistivity decreases, but an additional fabrication step is required
Solution Approach 1:
The planarization is performed as a preliminary step early in the fabrication sequence, before metal deposition. This timing allows the planar surface to benefit subsequent deposition steps, ensuring uniform grain growth and low resistivity access lines. The step is integrated into the existing fabrication flow with minimal disruption to productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decreases resistivity in access lines, enhances current delivery, and simplifies the fabrication process by reducing the complexity of etch steps, resulting in improved performance and reliability of memory devices.
Implementation Method 1
planarizing the top surface of the barrier material
Implementation Method 2
forming a metal layer for an access line on the top surface of the barrier material
Data Source
AI summary
Methods, systems, and devices for access line grain modulation in a memory device are described. A memory cell stack in a cross-point memory array may be formed. In some examples, the memory cell stack may comprise a storage element. A barrier material may be formed above the memory cell stack. The barrier material may initially have an undulating top surface. In some cases, the top surface of the barrier material may be planarized. After the top surface of the barrier material is planarized, a metal layer for an access line may be formed on the top surface of the barrier material. Planarizing the top surface of the barrier material may impact the grain size of the metal layer. In some cases, planarizing the top surface of the barrier material may decrease the resistivity of access lines formed from the metal layer and thus increase current delivery throughout the memory device.