Access Signal Adjustment for Cross-Point Memory Voltage Drops
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Solution Overview
Problem
Conventional memory architectures face challenges in scaling memory arrays and cells, leading to increased resistance in word lines or bit lines, which results in voltage drops and affects memory operations, particularly in third-dimensional memory technologies.
Innovation Solution
The development of an access signal generator that adjusts signal magnitudes to compensate for voltage drops across scaled memory arrays, using a positional characteristic adjuster and disturb isolator to ensure reliable access and minimize disturb effects, coupled with a slice-rolling controller to manage voltage magnitudes across multiple memory elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory arrays are scaled down to increase density, then memory capacity is improved, but resistance of word lines and bit lines increases causing voltage drops
Solution Approach 1:
The patent applies local quality by adjusting the magnitude of access signals based on the specific position of memory cells within the array. Different regions of the array receive differently adjusted signals to compensate for local variations in resistance and voltage drops, ensuring reliable operation across the entire scaled array while maintaining high density.
Solution Approach 2:
The patent changes the parameter of signal magnitude dynamically based on the position of accessed memory cells. The access signal generator modifies signal characteristics (voltage or current magnitude) according to the distance and location of target memory cells from array boundaries, compensating for resistance effects without requiring physical structural changes.
2Ease of manufacture
If conventional memory architectures are used in scaled arrays, then manufacturing simplicity is maintained, but voltage drops affect memory operations
Solution Approach 1:
The patent implements a universal access signal generator that can serve multiple functions: it generates access signals for all memory cells in the array and simultaneously adjusts signal magnitudes based on positional information. This multi-functional approach maintains architectural simplicity while ensuring reliable operation across the entire scaled memory array.
3Reliability
If access signals are increased to compensate for voltage drops, then voltage stability is improved, but disturb effects on non-selected cells increase
Solution Approach 1:
The patent applies local quality by precisely adjusting signal magnitudes according to the position of selected memory cells only. Non-selected cells receive appropriately adjusted signals that prevent disturb effects, while selected cells receive sufficient signal strength for reliable operation. This position-dependent adjustment eliminates the need for uniform signal increases across the entire array.
Solution Approach 2:
The patent implements preliminary anti-action by pre-calculating and applying appropriate signal magnitudes before access operations begin. The system anticipates potential disturb effects on non-selected cells and counteracts them by adjusting signal levels in advance, preventing harmful effects before they occur while maintaining voltage stability for selected cells.
Data Source
AI summary
Systems, integrated circuits, and methods to utilize access signals to facilitate memory operations in scaled arrays of memory elements are described. In at least some embodiments, a non-volatile memory device can include a cross-point array having resistive memory elements and line driver. The line driver can be configured to access a resistive memory element in the cross-point array.