Active DAC Output Termination for Impedance Matching and Lower Power

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Solution Overview

Problem

Existing digital-to-analog converters (DACs) in high-speed communication systems face challenges in efficiently managing impedance matching and power consumption, particularly in transmitting and receiving data between electronic devices, leading to performance degradation and increased power usage.

Innovation Solution

The implementation of a DAC with an active termination circuit using p-type and n-type metal oxide semiconductor (PMOS and NMOS) transistors, controlled by bias voltages to manage small signal resistance, which actively terminates the output and reduces power consumption while maintaining proper impedance matching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If traditional passive termination is used in DAC output, then impedance matching is achieved, but power consumption increases and performance degrades

Engineering Contradiction:
Improvepower consumptionVSAvoidperformance
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies active termination using PMOS and NMOS transistors that dynamically adjust their resistance based on bias voltages. The termination resistance is no longer fixed but can be controlled to match impedance requirements while minimizing power consumption. The transistors operate in different regions (linear or saturation) depending on the bias conditions to optimize both power efficiency and signal integrity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the termination approach from passive fixed resistance to active variable resistance controlled by bias voltages. By adjusting the bias voltages applied to the gates of termination transistors, the small-signal resistance can be tuned to achieve proper impedance matching. This parameter control allows the system to adapt termination characteristics to different operating conditions, reducing power consumption while maintaining performance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If active termination with PMOS and NMOS transistors is implemented, then power consumption is reduced and impedance matching is improved, but device complexity increases

Engineering Contradiction:
Improveimpedance matchingVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines both PMOS and NMOS termination transistors in a single active termination circuit at the DAC output. This merged structure allows simultaneous control of both pull-up and pull-down termination paths, achieving better impedance matching across the full signal swing. The bias circuit integrates control for both transistor types, managing complexity through unified design rather than separate termination circuits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The active termination circuit serves multiple functions: it provides impedance matching for signal integrity, controls power consumption through transistor biasing, and can adapt to different operating conditions. The same termination transistors handle both differential signal termination and power management, reducing the need for separate circuits and overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8947281B1Apparatus and methods for actively terminated digital-to-analog conversion
Publication Date: 2015.02.03 MARVELL ASIA PTE LTD
  • US8947281B1 patent drawing
  • US8947281B1 patent drawing
  • US8947281B1 patent drawing

AI summary

Apparatus and methods for digital-to-analog conversion are disclosed. In one embodiment, an electronic system includes a bias circuit and a digital-to-analog converter (DAC) including an input that receives a digital input signal and an output that drives a transmission line. The digital input signal can be used to control a magnitude and polarity of an output current of the DAC. The DAC further includes one or more p-type metal oxide semiconductor (PMOS) termination transistors that receive a first bias voltage from the bias circuit and one or more n-type metal oxide semiconductor (NMOS) termination transistors that receive a second bias voltage from the bias circuit. The bias circuit controls the voltage levels of the first and second bias voltages to control the termination transistors' small signal resistance to actively terminate the DAC's output.