Active Fin Width Trimming for Uniform FinFET Arrays
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Solution Overview
Problem
Current FinFET and nanosheet FET manufacturing processes result in variations in critical dimension widths of active fin/nanosheet arrays due to lithography patterning limitations, leading to unfavorable electrical characteristics and reduced transistor density.
Innovation Solution
A method is developed to form semiconductor devices with uniform and symmetrical FinFET/nanosheet profiles by forming a fin array with a shallow trench isolation layer, where the upper portion of the fins is trimmed using an angled reactive ion etch to match the critical dimension widths of inner and edge fins, ensuring uniformity and symmetry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography patterning is used to form fin arrays, then manufacturing process simplicity is maintained, but variations in critical dimension widths occur leading to unfavorable electrical characteristics
Solution Approach 1:
The fin array is divided into edge fins and inner fins, with each segment receiving tailored processing. The method segments the fin structure into regions that require different width adjustments, allowing precise control over critical dimensions by treating edge and inner fins differently during the trimming process
Solution Approach 2:
Different portions of the fin array are given different local properties through selective trimming. Edge fins receive different processing compared to inner fins, creating local quality variations that compensate for edge effects and achieve uniform electrical characteristics across the entire fin array
2Productivity
If lithography patterning limitations are accepted, then manufacturing simplicity is maintained, but transistor density is reduced due to width variations
Solution Approach 1:
The method performs preliminary trimming of the fin array before subsequent processing steps. By preemptively adjusting the critical dimensions of edge and inner fins through selective trimming, the process ensures uniform fin widths are established early, preventing variations from propagating through later manufacturing steps and affecting transistor density
3Reliability
If edge fins are trimmed to match inner fin widths, then uniformity of electrical characteristics is improved, but additional processing steps are required
Solution Approach 1:
The method introduces an intermediary trimming process that acts as a mediator between the initial lithography patterning and subsequent device fabrication. This intermediary step uses selective etching with carefully controlled parameters to adjust fin widths, serving as a bridge that corrects lithography limitations without requiring complete redesign of the manufacturing flow
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces variations in electrical characteristics, maximizes yields, and increases transistor density by achieving uniform active fin widths across the semiconductor device.
Implementation Method 1
the upper portion of the plurality of fins is trimmed using an angled reactive ion etch to match the critical dimension widths of inner and edge fins
Data Source
AI summary
A semiconductor device and formation thereof. The semiconductor device includes a plurality of fins grouped in a fin array. A first profile of an upper portion of each of the plurality of fins in the fin array located above a top surface of a shallow trench isolation layer is substantially similar. A second profile of a bottom portion of one or more inner fins in the fin array located below the shallow trench isolation layer is different than a third profile of the bottom portion of edge fins in the fin array located below the shallow trench isolation layer. A width of the bottom portion of the edge fins in the fin array located below the shallow trench isolation layer is greater than a width of the bottom portion of the one or more inner fins in the fin array located below the shallow trench isolation layer.