Active Matrix Substrate Aperture Design for High Ppi Manufacturing
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Solution Overview
Problem
The challenge in producing active matrix substrates with high definition is exacerbated by the two-layer electrode structure, where a large dielectric layer aperture leads to increased drain electrode size, causing constraints in intralayer spaces and making high-definition manufacturing difficult, especially at pixel densities above 370 ppi.
Innovation Solution
The active matrix substrate design features a first and second aperture in the interlayer insulating and dielectric layers, respectively, where the second aperture's contour is partially inside the first, reducing the non-overlapping area and allowing a smaller drain electrode size, thus enabling higher definition manufacturing without compromising intralayer spaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the aperture in the dielectric layer is formed to wholly fit within the aperture in the interlayer insulating layer to avoid stepping of the pixel electrode, then the connection reliability is improved, but the aperture size increases causing the drain electrode size to increase, which worsens the intralayer space availability
Solution Approach 1:
The patent applies nesting by forming the second aperture (in the dielectric layer) inside the first aperture (in the interlayer insulating layer). This nested configuration allows the pixel electrode to make reliable contact with the drain electrode through the stacked aperture structure, while the second aperture's positioning inside the first aperture minimizes the overall footprint and reduces the required drain electrode area, thus resolving the contradiction between connection reliability and space efficiency.
Solution Approach 2:
The patent transitions from a single-plane aperture design to a multi-layered three-dimensional aperture structure. By stacking the first aperture in the interlayer insulating layer with the second aperture in the dielectric layer, the design utilizes the vertical dimension to achieve reliable electrical connection while reducing the horizontal footprint, thereby solving the space constraint issue.
2Manufacturing precision
If the aperture in the dielectric layer is formed with a large diameter to ensure proper fitting within the interlayer insulating layer aperture, then the manufacturing precision is improved, but the intralayer spaces are reduced making high-definition manufacturing difficult
Solution Approach 1:
The nested aperture configuration allows the second aperture to be positioned inside the first aperture, ensuring proper alignment and fitting relationships. This nesting approach maintains manufacturing precision by establishing a clear hierarchical positioning relationship between the two apertures, while the optimized sizing of the nested structure prevents excessive space consumption in the intralayer regions.
Solution Approach 2:
The patent applies local quality by optimizing the aperture dimensions and positioning specifically in the critical contact region. The first and second apertures are sized and positioned to provide sufficient overlap for reliable electrical connection only where needed, rather than uniformly increasing all aperture dimensions, thus preserving intralayer spaces in non-critical regions for high-definition manufacturing.
3Reliability
If the drain electrode size is increased to accommodate the large aperture, then the electrical connection is improved, but the device complexity increases and high-definition manufacturing becomes difficult
Solution Approach 1:
The nested aperture structure enables reliable electrical connection between the pixel electrode and drain electrode through the stacked aperture configuration, while minimizing the drain electrode footprint. This reduces the overall pixel structure complexity compared to designs requiring larger, single-plane apertures and larger drain electrodes, facilitating high-definition manufacturing.
Data Source
AI summary
An active matrix substrate (100A) includes a TFT (20), a scanning line (11) substantially parallel to a first direction, a signal line (12) substantially parallel to a second direction which is orthogonal to the first direction, a first interlayer insulating layer (16) covering the TFT, a lower layer electrode (17) provided on the first interlayer insulating layer, a dielectric layer (18) provided on the lower layer electrode, and an upper layer electrode (19) overlapping at least a portion of the lower layer electrode via the dielectric layer. A first contact hole (31) includes a first aperture (16a) formed in the first interlayer insulating layer and a second aperture (18a) formed in the dielectric layer. A width of the first aperture along one of the first direction and the second direction is smaller than a width of the second aperture along the one direction. A portion of the contour of the second aperture is located inside the contour of the first aperture, and the contour of the second aperture is not rectangular. The area of the portion of the second aperture not overlapping the first aperture is smaller than that in an imaginary case where the contour of the second aperture is rectangular.