Active Matrix Substrate Bypass Routes for Scanning Line Disconnection
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Solution Overview
Problem
Conventional active matrix substrates are unable to correct disconnections in scanning signal lines, which affects the production yield and functionality of liquid crystal display devices.
Innovation Solution
The active matrix substrate design includes extended storage capacitor lines and data signal lines that form bypass routes for scanning signal lines, allowing for the correction of disconnections without cutting data signal lines, thereby eliminating the need for auxiliary lines and reducing the number of cut positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional active matrix substrate configuration is used, then manufacturing process is simple, but scanning signal line disconnection cannot be corrected
Solution Approach 1:
The substrate structure is segmented into functional regions: pixel electrodes on one side of the scanning signal line and storage capacitor lines on the other side. This segmentation allows the storage capacitor lines to serve dual purposes - both capacitance function and bypass route for scanning signal correction, resolving the contradiction by adding functionality without proportionally increasing complexity
Solution Approach 2:
The storage capacitor lines are designed to serve multiple functions: they provide storage capacitance for pixel electrodes and simultaneously form bypass routes for correcting scanning signal line disconnections. This multi-functionality improves reliability without requiring separate dedicated correction structures, thus avoiding excessive complexity increase
2Reliability
If auxiliary lines are added for correcting data signal line disconnection, then correctability is improved, but device complexity increases
Solution Approach 1:
The bypass routes for scanning signal correction are merged with the existing storage capacitor lines rather than being implemented as separate auxiliary lines. This merging approach provides correction functionality while utilizing already-present conductive structures, thereby improving reliability without adding the complexity of numerous auxiliary lines
Solution Approach 2:
Existing storage capacitor lines and data signal lines are made to serve dual purposes: their primary function (capacitance and data signal transmission) plus the additional function of forming bypass routes for scanning signal correction. This eliminates the need for separate auxiliary correction lines, resolving the contradiction between correctability and device complexity
3Reliability
If multiple cut positions are required for correction, then disconnection correction is possible, but manufacturing precision requirements increase
Solution Approach 1:
The invention extracts and utilizes existing conductive structures (storage capacitor lines and data signal lines) to form bypass routes, eliminating the need for creating new correction paths through multiple precise cuts. This approach maintains correctability while significantly reducing manufacturing precision requirements by avoiding multiple cut operations
4Reliability
If data signal lines are cut for correction, then disconnection can be addressed, but productivity decreases
Solution Approach 1:
The substrate is designed in advance with storage capacitor lines positioned to automatically form bypass routes for scanning signal correction. This preliminary configuration eliminates the need for corrective cutting operations during manufacturing, thereby maintaining production yield and productivity while still providing disconnection correctability
Data Source
AI summary
An active matrix substrate includes: storage capacitor line extended sections 118ax, 118qx, etc. each extending from a position on a storage capacitor line between (i) an intersection with one of two adjacent data signal lines 15 and 15q and (ii) an intersection with the other one of the two data signal lines 15 and 15q; and data signal line extended sections 15e and 15qe each extending from a position on a data signal line 15 or 15q between (i) an intersection with one of two adjacent scanning signal lines 16 and 16q and (ii) an intersection with the other one of the two adjacent scanning signal lines 16 and 16q, wherein a storage capacitor line extended section 118ax or 118ay extending from one of two adjacent storage capacitor lines 18a and 18q sandwiching no scanning signal line is connected with a storage capacitor line extended section 118qx or 118qy extending from the other one of the two adjacent storage capacitor lines 18a and 18q, wherein each of the storage capacitor line extended sections 118ax, 118ay, 118qz, and 118qy includes a section that does not overlap a pixel electrode, wherein each of the data signal line extended sections 118ax, 118ay, 118qz, and 118qy has a section overlapping a scanning signal line. This configuration makes it possible to correct a disconnection of a scanning signal line in an active matrix substrate.


