Active Pillar Gate Structure With Collapse-Resistant Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The insulating structure in semiconductor structures, particularly in DRAM, is prone to collapse due to its poor mechanical properties, affecting the stability and performance of the semiconductor structure as the number of layers increases.
Innovation Solution
A manufacturing method involving the formation of a first insulating layer with active pillars, partial removal to create trenches, deposition of an isolation layer with improved mechanical properties, and forming gate structures on the peripheral surfaces of active pillars to enhance stability and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the insulating structure is made thinner to reduce size and increase storage density, then the storage density improves, but the mechanical stability deteriorates causing collapse
Solution Approach 1:
The insulating structure is segmented into multiple discrete insulating layers separated by active pillar regions. This segmentation allows each insulating layer to be optimized independently for thickness and material composition, enabling sufficient mechanical stability while maintaining high storage density through efficient space utilization.
Solution Approach 2:
The patent employs composite material structures combining different insulating materials with varying mechanical properties. By selecting materials with appropriate strength-to-thickness ratios and combining them in multi-layer configurations, the structure achieves both the thinness required for high density and the mechanical stability needed to prevent collapse.
2Quantity of substance
If multiple layers of horizontally stacked transistors are added to increase storage density, then the storage density improves, but the insulating structure height increases making it more prone to collapse
Solution Approach 1:
The insulating structure is divided into multiple discrete insulating layers separated by active pillar regions. This segmentation allows each insulating layer to be optimized independently for thickness and material composition, enabling sufficient mechanical stability while maintaining high storage density through efficient space utilization.
Solution Approach 2:
The patent transitions from vertical stacking to horizontal integration by arranging memory cells in a planar configuration with active pillars extending in the third dimension. This dimensional reorganization allows high storage density to be achieved through lateral expansion rather than vertical stacking, thereby avoiding the insulating structure height increase that would compromise stability.
3Ease of manufacture
If the insulating layer is made thinner to facilitate manufacturing, then the manufacturing ease improves, but the reliability of the insulating structure deteriorates
Solution Approach 1:
The insulating structure is divided into multiple discrete insulating layers separated by active pillar regions. This segmentation allows each insulating layer to be optimized independently for thickness and material composition, enabling sufficient mechanical stability while maintaining high storage density through efficient space utilization.
Solution Approach 2:
The patent optimizes the thickness and material composition parameters of each insulating layer to achieve the minimum viable thickness that maintains reliability. By carefully controlling these parameters and using materials with appropriate mechanical properties, the structure achieves both manufacturing ease through thinness and reliability through sufficient mechanical strength.
Data Source
AI summary
The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The manufacturing method includes: forming a first insulating layer on a substrate, a plurality of active pillars are arranged at intervals along a first direction and a second direction in the first insulating layer; partially removing the first insulating layer, to form a plurality of first trenches, each first trench exposes the substrate, and is located between two adjacent columns of active pillars; forming an isolation layer in each first trench; removing at least a part of the first insulating layer between adjacent isolation layers, to form a first filling space, the first filling space exposes a peripheral surface of a middle region of the active pillar; and forming a gate structure on the exposed peripheral surface of the active pillar, the gate structures are integrated along the second direction.