Active Polarisation Circuit for High Impedance Input Detection
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Solution Overview
Problem
Existing circuits face challenges in detecting a high impedance state without consuming static current, particularly in low-consumption applications, as intermittent measurement methods are not suitable for brief events and pull-up impedance introduces static current consumption.
Innovation Solution
A circuit utilizing complementary MOS transistors to detect a floating node state, employing a latch configuration with N-channel and P-channel transistors to force the node to a low potential when floating, eliminating bias current consumption and leveraging leakage currents to maintain low impedance logic levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a pull-up impedance is used to bias the inverter input to avoid floating state, then the high impedance state can be detected, but static current consumption increases
Solution Approach 1:
The patent employs periodic sampling of the input node state through a controlled activation of the detection transistor. Instead of continuous biasing, the circuit periodically checks the voltage level at the input node, consuming current only during measurement intervals. This transforms the continuous static current consumption into periodic pulsed consumption, significantly reducing average power usage while maintaining reliable detection capability.
Solution Approach 2:
The detection mechanism utilizes the inherent leakage currents and parasitic capacitances of the circuit elements themselves rather than requiring external biasing components. The input node's own characteristics (leakage current, capacitance) are leveraged to enable the detection function, eliminating the need for separate pull-up resistors that would consume static current.
2Use of energy by moving object
If the pull-up impedance is increased to reduce static current, then power consumption decreases, but the discharge rate from the inverter input node to Vss becomes insufficient
Solution Approach 1:
The patent implements a dynamic detection approach where the transistor activation is controlled based on timing signals. The detection transistor is activated only during specific time windows when state changes are expected or need to be captured. This dynamic timing control allows the circuit to achieve fast response when needed while maintaining low power consumption during idle periods, effectively decoupling speed from continuous power consumption.
3Use of energy by moving object
If intermittent measurement is used to reduce static consumption, then power usage decreases, but brief events occurring between measurement phases cannot be detected
Solution Approach 1:
The circuit prepares the detection transistor and associated circuitry in advance, keeping them in a ready state capable of immediate activation. The sampling mechanism is pre-configured with appropriate timing circuits that can trigger detection at critical moments. This preliminary preparation ensures that when brief events occur, the detection system is already positioned to capture them without requiring continuous operation, thus maintaining both low power consumption and high reliability for transient event detection.
Data Source
Figure 1~3
AI summary
The invention relates to a circuit for detecting a floating state of a node, comprising a first MOS transistor (M1) with first conductivity type connected between the node (N) and a first power supply line (Vss); and a second MOS transistor (M2) of conductivity type complementary to the first conductivity type, controlled by the node (N) and connected between the gate of the first transistor (M1) and a second power supply line (Vdd). In addition, a third MOS transistor (M3) having the first conductivity type connected between the gate of the first transistor (M1) and the first power supply line (Vss) can be controlled by the node (N).