Semiconductor Active Region Extension for Contact Margin
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Solution Overview
Problem
As semiconductor devices become more integrated and feature patterns finer, the reduced size of active regions leads to fabrication and operational challenges, such as insufficient contact margins, which can deteriorate the refresh characteristics and reliability of devices like DRAM.
Innovation Solution
A method involving forming a trench in a semiconductor substrate, filling it with a first device isolation layer, recessing the layer to expose the active region's sidewall, epitaxially growing an extension portion, and forming a second device isolation layer to increase the contact area between the active region and a conductive contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of active regions is reduced to increase integration, then device integration increases, but contact margin becomes insufficient
Solution Approach 1:
The invention extends the active region in the vertical dimension by growing an extension portion that protrudes from the top surface of the isolation layer. This dimensional transition from 2D planar active region to 3D extended active region increases the contact area without increasing the lateral footprint, thereby maintaining high integration while improving contact margin.
Solution Approach 2:
The active region is segmented into two parts: the original active region in the substrate and the extension portion growing upward. This segmentation allows the contact structure to utilize both the original active region and the extended portion, effectively increasing the total contact area while maintaining the compact lateral dimensions required for high integration.
2Productivity
If the size of active regions is reduced to increase integration, then device integration increases, but fabrication difficulty increases
Solution Approach 1:
The extension portion is grown epitaxially on the exposed sidewall of the active region before contact formation. This preliminary action creates an extended active region structure in advance, simplifying subsequent contact fabrication by providing a larger target area for contact alignment and formation, thereby reducing overall fabrication difficulty despite the added epitaxial growth step.
3Area of stationary object
If the active region size is reduced, then chip size is reduced, but operational characteristics deteriorate
Solution Approach 1:
By extending the active region vertically upward from the substrate through epitaxial growth, the invention compensates for the reduced lateral dimensions. The extension portion provides additional contact area that improves operational characteristics such as contact margin and refresh characteristics, while the overall chip lateral dimensions remain small for high integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases the contact area between the active region and the conductive contact, enhancing the operational characteristics and reliability of semiconductor devices by providing a larger contact margin.
Implementation Method 1
The exposed sidewall of the active region is epitaxially grown to form an extension portion of the active region that extends partially across the top surface of the first device isolation layer in the trench
Data Source
AI summary
A method of forming a semiconductor device can include forming a trench in a semiconductor substrate to define an active region. The trench is filled with a first device isolation layer. A portion of the first device isolation layer is etched to recess a top surface of the first device isolation layer below an adjacent top surface of the active region of the semiconductor substrate and to partially expose a sidewall of the active region. The exposed sidewall of the active region is epitaxially grown to form an extension portion of the active region that extends partially across the top surface of the first device isolation layer in the trench. A second device isolation layer is formed on the recessed first device isolation layer in the trench. The second device isolation layer is etched to expose a top surface of the extension portion of the active region and leave a portion of the second device isolation layer between extension portions of active regions on opposite sides of the trench. An interlayer dielectric is formed on the semiconductor substrate and the second device isolation layer. A conductive contact is formed extending through the interlayer dielectric layer and directly contacting at least a portion of both the active region and the extension portion of the active region overlying the second device isolation layer.