Gate-Controlled Active Vias for Dense 3D Chip Interconnects
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Solution Overview
Problem
Conventional vias in semiconductor integrated circuits face challenges such as electromagnetic interference (EMI), limited density due to keep-out-zones, increased power consumption, and lack of electrostatic protection, as complexity and size of chips increase.
Innovation Solution
The introduction of an active via with a thin film transistor switch element that can be turned on or off, allowing for controlled signal passage and power management, reducing EMI, increasing via density, and improving thermal and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional vias are placed close together to increase density, then via density increases, but electromagnetic interference and crosstalk increase
Solution Approach 1:
The patent applies dynamics by making the via structure controllable through a gate signal. The depletion region can be dynamically adjusted by applying different voltages to the gate, allowing the via to switch between conductive and insulating states. This dynamic control enables dense via placement while preventing EMI by turning off unused vias.
Solution Approach 2:
The patent changes the electrical parameters of the via by introducing a gate terminal that controls the depletion region width. By varying the gate voltage, the electrical conductivity of the via can be modulated, allowing control over signal transmission and EMI generation. This parameter change enables dense packing while managing electromagnetic interference.
2Object-affected harmful factors
If keep-out-zones are maintained around vias to prevent EMI, then EMI is reduced, but available area for core components decreases
Solution Approach 1:
The dynamic control capability allows vias to be turned off when not in use, eliminating EMI generation. This removes the need for large keep-out-zones around inactive vias, as they no longer pose an EMI risk. The available area for core components is thereby increased while EMI protection is maintained through active control.
Solution Approach 2:
The via structure provides self-protection against EMI by using its own gate-controlled depletion region to prevent interference. When a via is turned off, its depletion region naturally isolates it from neighboring vias, eliminating the need for additional keep-out-zone space. The via essentially protects itself and its neighbors through controlled operation.
3Power
If conventional vias are used for power distribution, then power delivery is achieved, but power consumption increases
Solution Approach 1:
The dynamic control capability allows power distribution to be selectively enabled or disabled. By turning off vias that do not require power delivery, the system reduces unnecessary power consumption while maintaining the ability to deliver power when needed. This dynamic power management optimizes the balance between power delivery capability and actual power consumption.
Solution Approach 2:
The via can be periodically activated and deactivated based on operational requirements. This periodic action allows the system to deliver power only when necessary, reducing overall power consumption while maintaining the capability for power delivery when needed. The gate signal controls the periodic activation of the via for power distribution.
4Ease of manufacture
If processing steps are performed at high temperatures to manufacture conventional vias, then via formation is achieved, but neighboring components are affected and timing violations occur
Solution Approach 1:
The patent changes the material parameters by using a semiconductor layer with appropriate bandgap properties that allows via formation at lower temperatures. The semiconductor layer can be processed at temperatures that do not adversely affect neighboring components, while still achieving proper via formation. This parameter change in processing temperature improves reliability by preventing timing violations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Active vias effectively reduce or eliminate EMI, increase via density, enhance power and thermal efficiency, and provide electrostatic protection, enabling higher stacking and modularity while minimizing power consumption by turning off unused regions.
Implementation Method 1
the at least one transistor having a source contact, a drain contact and a gate contact, wherein the source contact is in electrical contact with a first circuit element of a chip, the drain contact is in electrical contact with a second circuit element of a chip and the gate contact is in electrical contact with a third circuit element of a chip, and wherein when one of the first, second or third circuit elements applies a voltage to its respective connected contact, the source contact and the drain contact are electrically connected when the at least one transistor forms a channel
Data Source
AI summary
An active via is taught which comprises at least one via and at least one transistor which acts as a switch element. The resulting active via can be used with 1D, 2.5D or 3D chips to: control circuit elements; reduce EMI between vias; increase the density of vias; improve power and thermal efficiencies of chips; simplify power, data and other routing networks on chips; enable a higher level stacking of dies or layers in a chip while maintaining modularity; etc. A control strategy system can be provided to remove the supply of power to one or more regions of the chip when the regions are not in use and to supply power to those regions when the regions are in use, or to control input and output to regions of the chip. The active vias can be fabricated with Back or Front End Of Line processes.