Redistribution Layers on Active Wafers to Minimize Package Warping
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Solution Overview
Problem
Existing semiconductor packages face challenges such as stress-induced warping of the package substrate, leading to issues like solder cold joints and bridging during surface mounting, particularly in high-performance computing applications, due to the use of separate interposers and multiple substrate layers.
Innovation Solution
Forming redistribution layers directly on an active wafer or semiconductor die, eliminating the need for a separate interposer, which reduces thermal expansion stresses and simplifies the fabrication process, allowing the active wafer to serve as the substrate, thereby improving co-planarity and reducing deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If separate interposers and multiple substrate layers are used, then integration density is improved, but thermal expansion stresses cause substrate warping
Solution Approach 1:
The patent merges the interposer function with the active wafer by forming redistribution layers directly on the active wafer surface. This eliminates the separate interposer substrate and reduces the number of layered structures, thereby maintaining integration density while minimizing thermal expansion stresses that cause warping.
Solution Approach 2:
The patent extracts and removes the separate interposer from the package structure. By eliminating this intermediate substrate layer, the design reduces thermal interfaces and stress accumulation points, preventing substrate warping while preserving the electrical redistribution function through layers formed directly on the active wafer.
2Adaptability or versatility
If separate interposers are used, then electrical redistribution is achieved, but fabrication complexity increases
Solution Approach 1:
The patent combines the electrical redistribution function with the active wafer fabrication process. Redistribution layers are formed directly on the active wafer using standard semiconductor manufacturing techniques, merging two previously separate functions (active device fabrication and electrical redistribution) into a single integrated process, thereby reducing fabrication complexity.
Solution Approach 2:
The active wafer is given multiple functions: it serves as both the substrate for active devices and as the platform for electrical redistribution. This multi-functionality eliminates the need for a dedicated interposer, simplifying the overall fabrication process while maintaining electrical redistribution capabilities.
3Adaptability or versatility
If multiple substrate layers are used, then signal routing flexibility is improved, but solder connection reliability deteriorates
Solution Approach 1:
The patent merges the signal routing function with the active wafer structure. Redistribution layers are formed directly on the active wafer, providing signal routing flexibility without introducing additional substrate layers that would create thermal expansion mismatches and warping, thereby maintaining solder connection reliability.
Data Source
AI summary
An embodiment semiconductor device may include a semiconductor die; one or more redistribution layers formed on a surface of the semiconductor die and electrically coupled to the semiconductor die; and an active or passive electrical device electrically coupled to the one or more redistribution layers. The active or passive electrical device may include a silicon substrate and a through-silicon-via formed in the silicon substrate. The active or passive electrical device may be configured as an integrated passive device including a deep trench capacitor or as a local silicon interconnect. The semiconductor device may further include a molding material matrix formed on a surface of the one or more redistribution layers such that the molding material matrix partially or completely surrounds the active or passive electrical device.