A/D Converter Timing Split for Fast, Accurate Oscillator Sensing

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Solution Overview

Problem

Existing A/D conversion technologies, such as successive comparison type and ΔΣ type, face challenges in achieving high-speed and high-accuracy conversion, particularly in temperature-compensated oscillators like DTCXO, where rapid temperature detection data is required for stabilizing oscillation frequency, leading to issues like frequency hopping and communication errors.

Innovation Solution

A circuit device with a register portion, D/A converter, comparison portion, and processing portion that performs A/D conversion by differing determination periods for MSB and LSB sides, allowing for high-speed and accurate conversion by optimizing the comparison process and updating result data based on comparison results, with the option to switch between A/D conversion methods and restrict changes in A/D conversion result data to minimize defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If A/D conversion is performed at high speed with uniform determination period for all bits, then conversion speed is improved, but conversion accuracy deteriorates

Engineering Contradiction:
ImproveA/D conversion speedVSAvoidA/D conversion accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent segments the A/D conversion process into two distinct phases: a first determination period for MSB (most significant bit) conversion and a second determination period for LSB (least significant bit) conversion. This segmentation allows each phase to be optimized independently - the MSB phase can operate faster while the LSB phase can allocate more time for higher precision, thereby resolving the contradiction between overall conversion speed and accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic determination periods where the time allocation for bit determination varies based on the significance of the bit being converted. MSB determination uses a shorter first determination period while LSB determination uses a longer second determination period. This dynamic timing strategy optimizes both speed and accuracy by matching time resources to the actual needs of each conversion stage.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If determination period for LSB side is extended to improve accuracy, then conversion accuracy is improved, but total conversion time increases

Engineering Contradiction:
ImproveA/D conversion accuracyVSAvoidA/D conversion period
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary determination of MSB values in the first determination period before proceeding to LSB determination. By establishing the coarse value range early with MSB conversion, the system creates a foundation that guides the subsequent LSB refinement process. This preliminary action reduces the search space for LSB determination, allowing accurate conversion without excessive time extension.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent structures the A/D conversion as periodic action with distinct first and second determination periods. The first period handles MSB conversion with shorter duration, and the second period handles LSB conversion with extended duration. This periodic structure with varying period lengths allows the system to balance accuracy requirements against time constraints by allocating time resources in a structured, optimized manner across conversion stages.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10404259B2Circuit device, oscillator, electronic apparatus, and moving object
Publication Date: 2019.09.03 SEIKO EPSON CORP
  • US10404259B2 patent drawing
  • US10404259B2 patent drawing
  • US10404259B2 patent drawing

AI summary

A circuit device includes a register that stores result data, a D/A converter that executes D/A conversion on the result data so as to output a D/A conversion voltage, a comparator that compares an input voltage with the D/A conversion voltage, and a processing circuit that executes an update process on the result data through a determination process based on a comparison result from the comparison portion, so as to obtain A/D conversion result data of the input voltage, in which the processing circuit executes the determination process on an MSB side of the A/D conversion result data in a first determination period, and executes the determination process on an LSB side of the A/D conversion result data in a second determination period longer than the first determination period.