Adaptive Integrated Circuit Design Tool Iteration

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Solution Overview

Problem

Current circuit design tools for integrated circuits, such as FPGAs, do not leverage previous execution results to improve subsequent design versions, leading to inefficient processing time and suboptimal results, as they treat each version independently without considering execution history or design specifics.

Innovation Solution

The method involves capturing statistical data from design tool iterations and using this data to automatically adjust operational attributes, allowing subsequent iterations to improve design performance and meet user constraints, thereby optimizing results and reducing processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If design tools process each version independently without leveraging previous execution results, then the tools maintain simplicity and consistency in processing, but the processing time increases and result quality does not improve across iterations

Engineering Contradiction:
Improveprocessing speedVSAvoidtool operational complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system performs preliminary actions by capturing statistical data during the first iteration and storing it in a project quality file. This preliminary data collection enables subsequent iterations to leverage previous results without reprocessing everything from scratch, thereby improving processing speed while managing complexity through automated data capture mechanisms

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by automatically adjusting tool operational attributes based on statistical data captured from previous iterations. The feedback loop compares results across iterations and modifies processing parameters to improve outcome quality, transforming the tool chain into an adaptive system that learns from each execution cycle

Inventive Principle:
Principle #23Feedback

2Loss of time

If design tools treat each design version as completely independent, then the processing logic remains consistent and simple, but the execution time increases significantly for successive versions with minor differences

Engineering Contradiction:
Improveexecution timeVSAvoidresult quality
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The system performs preliminary data capture and analysis during the first iteration, storing statistical information in a project quality file. This preliminary work prevents redundant processing in subsequent iterations, reducing execution time while maintaining or improving result quality through informed adjustments based on captured data

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system introduces dynamics by automatically adjusting tool operational attributes based on statistical data from previous iterations. Rather than using static, fixed processing parameters, the system dynamically modifies operational characteristics to optimize both execution time and result quality for each successive version

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7979816B1Method and apparatus for implementing a circuit design for an integrated circuit
Publication Date: 2011.07.12 XILINX INC
  • US7979816B1 patent drawing
  • US7979816B1 patent drawing
  • US7979816B1 patent drawing

AI summary

Method and apparatus for implementing a circuit design for an integrated circuit is described. In one example, a first version of the circuit design is processed (408) with at least one design tool. Statistical data is captured (410) for the at least one design tool and operational attributes thereof are automatically adjusted (420) in response to the statistical data. A second version of the circuit design is processed (422) with the at least one design tool having the adjusted operational attributes. In another example, the circuit design is processed (506) with at least one design tool in a first iteration. Statistical data is captured (508) for the at least one design tool and operational attributes thereof are automatically adjusted (514) for a second iteration in response to the statistical data of the first iteration. The circuit design is re-processed (516) with the at least one design tool having the adjusted operational attributes in the second iteration.