Adaptive Clock Generator Circuit for Multi-Rate Clock Coverage
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Solution Overview
Problem
Generating clocks for diverse clocked components with varying clock rates and settings in circuits like codec circuits is expensive and power-consuming due to the need for multiple clock generators and inefficient resource allocation.
Innovation Solution
An adaptive clock generator circuitry that includes a processor and clock generator resources, which executes a clock tree search algorithm to determine optimal resource configuration parameters based on input clock settings and target settings, reducing the need for multiple generators and optimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple clock generators are used to support diverse clocked components with varying clock rates, then clock signal coverage is improved, but circuit size and power consumption increase
Solution Approach 1:
The patent implements a universal clock generator that can dynamically generate multiple different clock signals with varying frequencies and duty cycles by using programmable dividers and configurable control logic. This single multi-functional generator replaces what would traditionally require multiple dedicated clock generators, thereby reducing power consumption while maintaining the ability to support diverse clocked components with different clock rate requirements
2Adaptability or versatility
If multiple clock generators are used to support diverse clocked components with varying clock rates, then clock signal coverage is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal clock generator that can dynamically generate multiple different clock signals with varying frequencies and duty cycles by using programmable dividers and configurable control logic. This single multi-functional generator replaces what would traditionally require multiple dedicated clock generators, thereby reducing circuit size while maintaining the ability to support diverse clocked components with different clock rate requirements
Solution Approach 2:
The patent employs dynamic clock generation where the clock generator can adapt its output parameters (frequency, duty cycle) in real-time based on control signals. The programmable dividers and configurable control logic allow the system to dynamically switch between different clock configurations without requiring multiple static clock generators, thus simplifying the overall device architecture
Data Source
AI summary
A circuit includes: digital circuits having respective clock inputs; and adaptive clock generator circuitry having clock outputs. Each respective clock input is coupled to one of the generator clock outputs. The adaptive clock generator circuitry includes: a processor having an input interface and an output interface; and clock generator resources having a control input, a root clock input and resource clock outputs. The processor is configured to provide resource configuration parameters at the output interface in response to clock settings received at the input interface and target settings. The control input is coupled to the output interface. Each resource clock output of the resource clock outputs is coupled a respective generator clock output of the generator clock outputs. The clock generator resources are configured to provide a respective clock signal at each of the resource clock outputs in response to the resource configuration parameters received at the control input.