Pulse Automatic Control TRIZ Cases
- Cross-Coupled Charge Pump Biasing for Higher Output Impedance
Independent bias control in a cascaded cross-coupled load raises charge pump output impedance and preserves voltage split when input duty shifts.
- Memory DLL Load-Adaptive Delay Control for tAC Margin
A transfer-delay circuit adjusts DLL feedback delay to DIMM load, preserving tAC margin and data-clock synchronization at high speed.
- PLL Frequency Setting Circuit With Reduced Table Memory
A quotient-remainder table lets a PLL frequency setting circuit cover multiple modes with less memory and a smaller circuit.
- DLL Duty Ratio Control With Dual Feedback After Locking
Dual feedback in a DLL maintains output clock duty ratio after locking despite PVT changes, while cutting power use and circuit area.
- Power System Frequency Detection Under Disturbance and Phase Jumps
Orthogonal coordinate conversion with moving average and low-pass filtering helps track grid frequency quickly while suppressing phase-jump errors.
- Charge Pump Feedback Circuit for Duty Cycle Offset Reduction
A feedback-biased charge pump equalizes transistor drain voltages to cut mismatch and charge-sharing errors in duty cycle correction.
- RF Power Amplifier Switching for Multi-Class Transmission
A divider-combiner RF path with switchable amplifiers supports high and non-high power classes in a smaller circuit with lower transfer loss.