Phase-Locked Loop Feedback Modulation for Smaller Loop Filters
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Solution Overview
Problem
Conventional phase locked loops implemented on integrated circuits require significant silicon area and external components, especially for fractional loops, due to large capacitance values needed for stability and settling performance, which increases circuit board area and cost.
Innovation Solution
A controller for the phase locked loop that modulates the feedback signal based on frequency or phase errors between the output and reference signals, using a delta-sigma modulator to reduce the impact of high-frequency noise and simplify the analog loop filter, thereby reducing the number of analog components and silicon area required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional analog loop filter design is used to ensure stability and settling performance, then the phase locked loop achieves desired closed loop bandwidth and loop settling time, but the loop filter occupies large silicon area and requires external components
Solution Approach 1:
The patent replaces the traditional analog loop filter with a digital filter implemented in the frequency detector. This substitution eliminates the need for large analog capacitors (C1, C2) and external components, significantly reducing both silicon area and circuit board area while maintaining the required stability and settling performance through digital signal processing.
Solution Approach 2:
The patent changes the implementation domain from analog to digital by implementing the loop filter functionality in the digital frequency detector. This parameter change allows the system to achieve the same filtering and stability characteristics without requiring large physical capacitors, thereby reducing component size and overall system area.
2Reliability
If large capacitance values are used for C1 and C2 to achieve suitable charge pump current and VCO gain in fractional phase locked loops, then the loop achieves proper impedance level and stability, but the capacitor sizes increase silicon area significantly
Solution Approach 1:
The patent eliminates the need for large analog capacitors C1 and C2 by implementing the loop filter digitally in the frequency detector. This substitution removes the physical capacitors that occupy significant silicon area, while the digital implementation maintains proper impedance control and stability through software-based filtering algorithms.
Solution Approach 2:
The patent extracts the filtering functionality from the analog domain and relocates it to the digital domain within the frequency detector. This extraction eliminates the need for large physical capacitors while preserving the essential loop filtering characteristics required for stability and proper impedance level.
3Reliability
If conventional charge-pump based phase locked loop is used to achieve frequency accuracy and phase stability, then the system provides reliable local oscillator and clock signals, but the implementation requires significant silicon area and external components
Solution Approach 1:
The patent merges the frequency detector and loop filter functions into a single digital implementation unit. This integration eliminates the need for separate analog filter components and reduces the number of external components required, thereby significantly reducing silicon area while maintaining frequency accuracy and phase stability through coordinated digital processing.
Solution Approach 2:
The patent substitutes the analog loop filter with a digital filter implementation, eliminating the need for large physical capacitors and external components. This substitution maintains the reliability of frequency accuracy and phase stability while dramatically reducing the silicon area required for implementation.
Data Source
AI summary
A method and apparatus for controlling phase locked loop are provided. The apparatus includes a voltage controlled oscillator configured to generate an output signal with a frequency proportional to a control voltage fed into the oscillator. The apparatus also includes an analog loop filter connected to the oscillator and configured to form the control voltage for the oscillator, and a charge pump configured to generate a current pulse into the loop filter. The apparatus includes a phase-frequency detector operationally connected to the charge pump and configured to form waveforms, based on a reference signal and a feedback signal, the feedback signal being proportional to the output signal of the oscillator. The apparatus further includes a controller configured to modulate the feedback signal on the basis of the frequency or phase error of the output signal of the voltage controlled oscillator and the reference signal.