Track-and-Hold Charge Pump Calibration for Stable PLL Bandwidth

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Solution Overview

Problem

Analog phase-locked loops (PLLs) face challenges in bandwidth stabilization and tracking due to variations in process, supply voltage, and temperature (PVT), leading to uncertainties in voltage-controlled oscillator (VCO) gain and charge pump current, which affect phase noise, reference spurs, and lock time.

Innovation Solution

Incorporating a bandwidth calibration circuit that adjusts the charge pump gain by modifying the transconductance, pulse width, or slew rate of the track and hold charge pump, allowing automatic bandwidth adjustment to optimize PLL performance across varying conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the charge pump current is increased to reduce phase noise, then phase noise is reduced, but the bandwidth becomes unstable due to PVT variations

Engineering Contradiction:
Improvephase noiseVSAvoidbandwidth stability
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent changes the operational parameters of the charge pump by adjusting the transconductance of the OTA and the pulse width of the PWM signal to compensate for PVT variations. This allows the system to maintain stable bandwidth while operating at optimal charge pump current levels for minimal phase noise.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the bandwidth calibration circuit continuously monitors and adjusts the charge pump gain based on detected bandwidth deviations. This feedback loop ensures bandwidth stability while allowing the charge pump current to be optimized for phase noise performance.

Inventive Principle:
Principle #23Feedback

2Loss of time

If the PLL bandwidth is widened to improve lock time, then lock time is reduced, but phase noise increases

Engineering Contradiction:
Improvelock timeVSAvoidphase noise
Core Design Contradiction:
Loss of timeVSObject-affected harmful factors

Solution Approach 1:

The patent employs dynamic bandwidth adjustment where the PLL bandwidth is not fixed but can be calibrated and adjusted based on operating conditions. This allows the system to achieve fast lock times when needed while maintaining the ability to narrow bandwidth for low phase noise operation when locked.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the bandwidth parameter dynamically through the bandwidth calibration circuit, which adjusts the charge pump gain to optimize the trade-off between lock time and phase noise based on actual PVT conditions.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the transconductance of the OTA is increased to improve bandwidth tracking, then bandwidth tracking is improved, but the charge pump current increases causing higher phase noise

Engineering Contradiction:
Improvebandwidth trackingVSAvoidphase noise
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent optimizes the transconductance parameter of the OTA to achieve the desired bandwidth tracking performance while minimizing the resulting charge pump current increase. This involves careful selection and calibration of the OTA's transconductance value to balance tracking accuracy with phase noise performance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10523218B2Track-and-hold charge pump and PLL
Publication Date: 2019.12.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10523218B2 patent drawing
  • US10523218B2 patent drawing
  • US10523218B2 patent drawing

AI summary

Track-and-hold charge pumps and PLL are provided. A track-and-hold charge pump includes a track-and-hold circuit, a transconductance amplifier, a pulse width modulator (PWM), and a pumping switch coupled to the transconductance amplifier. The track-and-hold circuit samples an input signal according to a reference clock. The transconductance amplifier converts the sampled input signal into a current. The PWM provides a PWM signal according to the reference clock. The pumping switch is controlled by the PWM signal, to provide an output current according to the current.