Clock Recovery Circuit with Proportional Path for Stable Loop Filtering
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Solution Overview
Problem
The existing clock and data recovery circuits face challenges in high-speed applications due to the adverse effects of resistor and capacitor inconsistencies in the loop filter, leading to instability and complexity in design, particularly with the introduction of parasitic capacitors that cause third-order effects and degrade loop stability.
Innovation Solution
A clock and data recovery circuit with a proportional path and a separate integral path, where the loop filter consists only of an integral capacitor, and a voltage-controlled oscillator with a current mirror and current modulation module, allowing for independent phase and frequency adjustments, thereby eliminating third-order effects and simplifying circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a loop filter with both resistor and capacitor is used in the clock and data recovery circuit, then frequency control capability is improved, but loop stability deteriorates due to parasitic capacitors causing third-order effects
Solution Approach 1:
The loop filter is segmented into two independent paths: a proportional path containing only a capacitor for phase control, and a separate integral path containing a resistor and capacitor for frequency control. This segmentation eliminates the interaction between resistor and capacitor that causes third-order effects and instability, while maintaining both phase and frequency control capabilities through independent adjustment of each path's components.
2Speed
If a bang-bang phase detector is used for high-speed data transmission, then tuning speed is improved, but phase correction precision deteriorates due to non-linear correction and continuous correction requirements
Solution Approach 1:
The phase detector employs dynamic correction strategies with two modes: a linear correction mode for small phase differences that provides precise incremental adjustment, and a bang-bang correction mode for large phase differences that provides rapid coarse adjustment. The system dynamically switches between these modes based on the magnitude of phase error, achieving both high speed and high precision phase correction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high-response phase adjustments suitable for both high and low frequencies, reduces circuit complexity, and significantly decreases hunting jitter, making the circuit suitable for high-speed applications like USB3.0 or SATA techniques.
Implementation Method 1
The current mirror has a current-controlling path and a current-outputting path. The current-controlling path and the current-outputting path are in a proportional relationship.
Implementation Method 2
The voltage-controlled oscillator is connected to the loop filter and the phase detector for generating a second output clock signal and adjusting the frequency of the second output clock signal according to the control voltage.
Implementation Method 3
The loop filter is electrically connected to the charge pump for receiving the switching signal and generating a corresponding control voltage.
Data Source
AI summary
A clock and data recovery circuit includes a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator and a frequency divider. The voltage-controlled oscillator includes a current mirror, a control circuit, a current modulation module and a current-controlled oscillator. The current mirror has a current-controlling path and a current-outputting path. The current-controlling path and the current-outputting path are in a proportional relationship. The control circuit is used for adjusting the current flowing through the current-controlling path according to the control voltage. The current modulation module is used for generating a differential current according to the judging signal. The current-controlled oscillator is used for adjusting the phase of the second output clock signal according to the sum of the differential current and the current flowing through the current-outputting path.