Delay Locked Loop Frequency Detection for Coarse Locking Stability
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Solution Overview
Problem
Existing delay locked loop (DLL) circuits face failures in coarse locking operations, particularly during low-frequency inversion locking, due to an improperly adjusted coarse locking window that does not correspond to the frequency band, leading to inefficiencies and increased power consumption.
Innovation Solution
A DLL circuit with a frequency detector generating strobe signals to determine if the input frequency is within a predetermined range, and a direct phase detector controlling the coarse locking window based on these signals to prevent failures, including a delay lock reset unit for initializing and enabling the delay lock process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed coarse locking window is used in DLL circuit, then the circuit structure is simple, but coarse locking fails in low-frequency inversion locking operations
Solution Approach 1:
The coarse locking window is made dynamically adjustable based on the frequency band of the external clock signal. The circuit switches between a first coarse locking window for high-frequency bands and a second coarse locking window for low-frequency bands, allowing the window parameters to adapt to different operating conditions and prevent locking failures.
Solution Approach 2:
The invention changes the parameters of the coarse locking window (width, position, or shape) according to the detected frequency band. By detecting whether the external clock frequency is above or below a reference frequency, the circuit selects appropriate window parameters to ensure reliable coarse locking across different frequency ranges.
2Reliability
If the coarse locking window is adjusted to cover all frequency bands, then coarse locking reliability improves, but power consumption increases
Solution Approach 1:
Instead of using a permanently wide window to cover all frequency bands, the circuit dynamically adjusts the window size based on the actual operating frequency. The frequency band detector enables the circuit to select an appropriate window width, avoiding the continuous power consumption associated with maintaining a maximally wide window at all times.
3Reliability
If frequency band detection is added to adjust coarse locking window, then coarse locking failure is prevented, but device complexity increases
Solution Approach 1:
The frequency detection function is segmented into a separate frequency band detector module, which independently determines the operating frequency band and provides control signals to the coarse locking window adjustment logic. This modular approach isolates the complexity of frequency detection from the main DLL circuit, making the overall system more manageable and maintainable.
Data Source
AI summary
A delay locked loop circuit includes a delay locked loop receiving an external clock, a frequency detector delaying an input frequency signal to generate a plurality of strobe signals and outputting a check signal indicating that the frequency of the input frequency signal is equal to or lower than a reference frequency when all of the strobe signals are positioned within a first-status section of one cycle of the input frequency signal, a delay lock reset unit generating a reset signal to reset the frequency detector and an activation signal to enable the delay locked loop to perform a delay lock process, and a direct phase detector controlling a coarse locking window on the basis of the check signal and generating a pair of phase detection signals indicating logic levels of the external clock. According to this configuration, since the coarse locking window is controlled as per a frequency band, it is possible to prevent a failure of a coarse locking and to achieve an improved circuit performance.