Internal Clock Calibration for Accurate Sleep Mode Timing
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Solution Overview
Problem
Computers in sleeping mode rely on internal clock signals, which are inaccurate, leading to potential timing errors due to the absence of external clock signals, affecting the accuracy of timekeeping and functionality.
Innovation Solution
A clock calibration method and device that generates a pulse signal based on an external clock source to determine the count value of internal clock cycles, allowing for calibration of the internal clock signal to ensure accuracy, even when external clock signals are unavailable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the computer uses the internal clock signal during sleeping mode, then power consumption is reduced, but timing accuracy deteriorates
Solution Approach 1:
The system performs preliminary calibration of the internal clock signal using the external clock signal before entering sleeping mode. The calibration module adjusts the internal clock signal based on the accurate external clock signal, storing calibration data that compensates for frequency deviations. This preliminary action ensures that even though the internal clock is used during sleep mode (saving power), its accuracy is maintained through pre-adjustment.
2Use of energy by moving object
If the computer stops receiving the external clock signal during sleeping mode, then power consumption is reduced, but clock signal accuracy deteriorates
Solution Approach 1:
The calibration module acts as an intermediary that transfers timing accuracy from the external clock signal to the internal clock signal. During awake mode, the calibration module compares the external clock signal with the internal clock signal and adjusts the internal clock's frequency divider ratios to match the external clock's accuracy. This intermediary calibration process allows the system to switch to power-saving mode while maintaining clock accuracy through the pre-established calibration relationship.
3Device complexity
If the computer uses the inaccurate internal clock signal, then device complexity is reduced, but timing precision deteriorates
Solution Approach 1:
The calibration module changes the operational parameters of the internal clock signal by adjusting frequency divider ratios based on calibration data. Instead of replacing the simple internal clock circuit with a complex external clock system during sleep mode, the system modifies the internal clock's timing parameters (divider ratios) to compensate for its inherent inaccuracies. This parameter adjustment maintains timing precision while preserving the simplicity and low power consumption of the internal clock architecture.
Data Source
AI summary
An embodiment of the invention provides a clock calibration method to calibrate an internal clock signal of a computer. The method comprises: receiving an external clock signal from an external clock source; generating a pulse signal with a first duration according to the external clock signal; counting the internal clock signal according to the pulse signal to get a first count value; and calibrating the internal clock according to the first count value.