DCO Frequency Resolution Switching for FMCW Radar Chirp Bandwidths

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Solution Overview

Problem

Existing DCO circuit implementations face challenges in efficiently managing frequency resolution for different chirp bandwidths, particularly in radar applications, leading to suboptimal phase noise performance in long-range and short-range radar systems.

Innovation Solution

A programmable DCO circuit with a capacitive arrangement and control circuit that adjusts frequency resolution based on selected chirp bandwidth, using multiple capacitance banks to optimize phase noise performance for both long-range and short-range radar applications by varying capacitance value steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed frequency resolution is used in the DCO circuit, then the circuit structure is simple, but the phase noise performance is suboptimal for different chirp bandwidths

Engineering Contradiction:
Improvephase noise performanceVSAvoidDCO circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic frequency resolution control by making the DCO circuit's frequency resolution adjustable based on the selected chirp bandwidth. The control circuit receives the chirp bandwidth signal and dynamically configures the DCO to use appropriate frequency resolution levels, allowing the system to adapt to different radar application requirements (long-range vs short-range) and optimize phase noise performance for each scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the frequency resolution parameter of the DCO circuit according to the selected chirp bandwidth. By varying this key parameter dynamically, the system achieves optimal phase noise performance for different operational modes without requiring fundamentally different circuit designs, thus balancing performance improvement with circuit complexity management.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If high frequency resolution is used for long-range radar, then range resolution is improved, but the chirp bandwidth must be limited

Engineering Contradiction:
Improverange resolutionVSAvoidchirp bandwidth selection
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The system dynamically adjusts the frequency resolution of the DCO based on the selected chirp bandwidth mode. For long-range radar applications, the control circuit configures the DCO to use high frequency resolution, enabling precise range measurement. For short-range applications, the system switches to lower frequency resolution, allowing wider chirp bandwidths to be used effectively. This dynamic adaptation resolves the contradiction by making frequency resolution a variable parameter rather than a fixed constraint.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If low frequency resolution is used for short-range radar, then chirp bandwidth can be increased, but range resolution deteriorates

Engineering Contradiction:
Improvechirp bandwidthVSAvoidrange resolution
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The control circuit dynamically configures the DCO frequency resolution based on the operational mode. When short-range radar with wide chirp bandwidth is selected, the system uses lower frequency resolution to maintain frequency coverage. When long-range radar requiring high range resolution is selected, the system switches to higher frequency resolution. This dynamic switching ensures that range resolution is maintained at appropriate levels for each application scenario.

Inventive Principle:
Principle #15Dynamics

4Reliability

If the DCO frequency resolution is not adjusted according to chirp bandwidth, then the control circuit is simple, but phase noise performance is suboptimal

Engineering Contradiction:
Improvephase noise performanceVSAvoidcontrol circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control circuit is designed to be multi-functional, handling both the selection of chirp bandwidth modes and the configuration of DCO frequency resolution based on that selection. This universal control approach allows the system to optimize phase noise performance across different operational modes without requiring separate control mechanisms for each function, thus managing complexity efficiently while achieving the desired performance improvements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables improved phase noise management, allowing for optimized trade-offs between chirp bandwidth and range resolution, enhancing the performance of frequency modulated continuous-wave radar systems.

Implementation Method 1

A DCO circuit includes an array of switchable capacitive elements, for example varactors, that form a capacitive arrangement. The capacitive arrangement defines the frequency of the DCO circuit.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentEP3739760B1Methods and apparatuses for digitally controlled oscillator frequency resolution control
Publication Date: 2025.11.19 NXP USA INC
  • EP3739760B1 patent drawingFigure 1
  • EP3739760B1 patent drawingFigure 2A
  • EP3739760B1 patent drawingFigure 2B

AI summary

An example apparatus (100) is for use for use with front-end circuitry (102) to transmit and receive radar wave signals. The apparatus (100) includes digital phase locked loop (PLL) circuitry (104) and a control circuit (106). The digital PLL circuitry (106) provides a chirp sequence with frequency modulated continuous wave signals (FMCW), the FMCW signals being chirps containing a start frequency and a stop frequency, representing a selected chirp bandwidth (BW). The digital PLL circuitry (104) includes the DCO circuit (108) which frequency resolution is configured and arranged to be tuned relative to the selected chirp BW, the frequency resolution configured in response to a selected level of capacitance. The control circuit (106) controls the selected level of capacitance used by the DCO circuit (108) by changing the frequency resolution of the DCO according to the selected chirp BW, wherein different frequency resolutions are used for a first selected chirp BW and for a second selected chirp BW.