Sensor Signal Synchronization Using Counter Correction

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Solution Overview

Problem

In sensor devices, the asynchronous operation between the internal clock generator and the externally supplied request signal leads to variable dead time, causing disturbances in control accuracy, particularly in drive systems, due to the asynchronicity between the basic cycle clock and the request signal clock.

Innovation Solution

A sensor device that synchronizes its counter reading with the request clock using a digital means, involving a clock generator, counter, exciter device, and evaluation device, which corrects the counter reading based on the request signal edges and outputs a synchronized sensor signal, thereby maintaining stable operation and preventing disturbances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the sensor device uses an internal clock generator operating at high frequency (100 MHz or more) for raw signal acquisition, then the sampling rate and measurement precision are improved, but the asynchronicity with the externally supplied request signal (8 kHz or 16 kHz) causes variable dead time and control accuracy disturbances

Engineering Contradiction:
Improvesampling precisionVSAvoidcontrol accuracy
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the sensor device monitors the phase relationship between its internal clock and the external request signal, and adjusts its output timing accordingly. The device calculates the dead time based on clock cycles and uses this information to synchronize the sensor signal output with the request signal edges, eliminating the variable dead time that would otherwise occur due to asynchronicity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the timing parameter of the sensor signal output dynamically. Instead of using a fixed timing relationship, the device adjusts the output timing based on the detected phase relationship between the internal clock and external request signal. This allows the system to maintain high sampling rates while synchronizing the output to eliminate dead time variability.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the sensor device outputs the last internally generated value as the sensor signal, then the device complexity is reduced, but the variable dead time causes disturbances in control accuracy

Engineering Contradiction:
Improvesignal processing complexityVSAvoidcontrol accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent performs preliminary action by calculating and compensating for the dead time in advance. The device determines the phase relationship between its internal clock and the external request signal, and uses this information to adjust the timing of the sensor signal output before it is sent to the higher-level device. This preliminary synchronization prevents the variable dead time from affecting control accuracy.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the sensor device uses an analog phase-locked loop for synchronization, then the synchronization precision is improved, but the device complexity and analog circuit requirements increase

Engineering Contradiction:
Improvesynchronization precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces the analog phase-locked loop mechanism with a digital implementation. Instead of using analog circuits to detect and correct phase differences, the device uses digital logic to monitor the relationship between the internal clock and external request signal, and applies digital corrections to the output timing. This substitution maintains synchronization precision while significantly reducing circuit complexity and eliminating the need for analog PLL components.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11662226B2Sensor device with synchronization of a sensor signal with a request signal
Publication Date: 2023.05.30 SIEMENS AG
  • US11662226B2 patent drawing
  • US11662226B2 patent drawing
  • US11662226B2 patent drawing

AI summary

A sensor device has a clock generator, a counter, an exciter device, a sensor element and an evaluation device, and outputs a sensor signal in response to a request signal having alternating leading and trailing edges. The counter reading is incremented differently, depending on whether the request signal has a leading/trailing edge between two successive leading or trailing edges of the clock signal. If the request signal has such a leading/trailing edge the counter corrects the counter reading. The value of the excitation signal outputted by the exciter device depends on the counter reading or a value derived therefrom. The sensor element outputs based on the excitation signal a raw signal, which is supplied to the evaluation device. The evaluation device determines based on this information whether to acquire the raw signal and how to take the raw signal into account when establishing the sensor signal.