ASIC System Clock Calibration Using Reference Signal Counting
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Solution Overview
Problem
Existing methods for calibrating the frequency of embedded oscillators in ASICs are time-consuming and costly due to the need for external test devices and iterative frequency measurements.
Innovation Solution
A method and device for setting a system clock in ASICs using an integrated circuit with an oscillator module, counter module, and communication interface, allowing for frequency calibration through a simple test device connected to the integrated circuit, utilizing a reference signal and counter target value to iteratively adjust the oscillator frequency without complex calculations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external test devices are used for frequency measurement and calibration, then measurement accuracy is improved, but testing time and cost increase
Solution Approach 1:
The integrated circuit performs self-calibration by using its own internal counter module to count system clock cycles against a reference signal. The device determines its own frequency deviation and automatically adjusts the oscillator configuration without requiring external frequency measurement equipment, thereby eliminating time-consuming external testing while maintaining calibration accuracy
Solution Approach 2:
A simple counter module serves as an intermediary between the oscillator and external test devices. Instead of directly measuring frequency with complex external equipment, the counter module counts clock cycles during a reference signal period and converts frequency information into a digital counter value that can be easily processed and used for calibration decisions
2Manufacturing precision
If iterative frequency measurements and configuration changes are performed, then calibration accuracy is improved, but testing time and complexity increase
Solution Approach 1:
The system implements a feedback loop where the counter module continuously monitors the relationship between system clock cycles and reference signal periods. The counter value is compared against an expected value, and the difference feeds back to adjust the oscillator configuration, enabling automatic convergence to the correct frequency without complex external measurement and adjustment procedures
Solution Approach 2:
The calibration process adjusts the oscillator's operating parameters (frequency) based on the counter value feedback. By changing the oscillator configuration to modify the system clock frequency, the system iteratively converges to the target frequency where the counter value matches the expected value, achieving accurate calibration through simple parameter adjustments rather than complex testing
3Manufacturing precision
If multiple frequency measurements and configuration changes are performed, then desired target frequency is achieved, but production cost increases
Solution Approach 1:
The integrated circuit performs its own frequency calibration using built-in counter and comparison logic, eliminating the need for expensive external frequency measurement equipment and multiple iterative adjustments. The self-calibration capability is integrated into the device, allowing rapid one-time calibration during production without requiring costly external testing infrastructure
Solution Approach 2:
The invention replaces expensive, complex external test equipment with a simple, inexpensive counter module integrated within the ASIC. The counter module uses basic digital logic to count clock cycles and generate calibration data, providing a cost-effective solution that eliminates the need for expensive external frequency counters and measurement devices
Data Source
AI summary
A method for setting a system clock of an integrated circuit. The integrated circuit has an oscillator module which specifies a system clock of the integrated circuit, a counter module, a signal input, and a communication interface. The method includes: receiving a reference signal at the signal input for a predefined duration; incrementing the counter module by one per system clock of the integrated circuit over the duration of the application of the reference signal; ascertaining a counter value of the counter module after expiration of the duration; receiving a counter target value at the communication interface, which counter target value corresponds to a number of system clocks at a target frequency during the duration; comparing the counter value of the counter module with the counter target value and correcting a frequency of the oscillator module based on a deviation of the counter value from the counter target value.