Reference Clock Source Selection for Spurious Frequency Mitigation

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Solution Overview

Problem

Existing electronic devices, such as RF transceivers, face challenges with spurious signals that can interfere with their operation, and current methods to eliminate these signals involve time-consuming and costly redesign processes.

Innovation Solution

A method involving a frequency synthesizer and multiplexers to generate and select between two clock signals, with a processor identifying and mitigating spurious frequencies by switching between them to ensure optimal operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If prior methods of eliminating spurious signals by redesigning components are used, then spurious signals can be eliminated, but the process is time-consuming and expensive

Engineering Contradiction:
Improvespurious signalsVSAvoiditerative redesign and testing time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The system performs preliminary action by proactively generating multiple candidate clock signals before they are needed and pre-identifying spurious frequency components. The processor pre-analyzes potential spurious signals and prepares switching decisions in advance, eliminating the need for time-consuming iterative redesign and testing cycles.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes parameters by providing multiple clock signals with different frequencies (first clock signal at frequency f1, second clock signal at frequency f2) and dynamically switching between them based on spurious signal conditions. This allows the system to eliminate spurious signals by changing the operating frequency parameter rather than redesigning components.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If prior methods of eliminating spurious signals by redesigning components are used, then spurious signals can be eliminated, but the cost increases

Engineering Contradiction:
Improvespurious signalsVSAvoidmanufacturing cost
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The system changes parameters by providing multiple clock signals with different frequencies (first clock signal at frequency f1, second clock signal at frequency f2) and dynamically switching between them based on spurious signal conditions. This allows the system to eliminate spurious signals by changing the operating frequency parameter rather than redesigning components, significantly reducing manufacturing costs.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements self-service by automatically monitoring for spurious signals and autonomously switching between clock signals without requiring external intervention or redesign. The processor continuously monitors the output and performs switching decisions automatically, eliminating the need for costly manual redesign and testing processes.

Inventive Principle:
Principle #25Self-service

3Device complexity

If a single reference clock signal is used, then the device structure is simple, but spurious signals cannot be mitigated

Engineering Contradiction:
Improveclock signal generation structureVSAvoidspurious signals
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The system implements multi-functionality by making the reference clock signal source selectable between two different frequency sources (first frequency synthesizer and second frequency synthesizer). The multiplexer allows a single reference clock output to serve multiple functions by drawing from different sources based on conditions, enabling spurious signal mitigation without significantly increasing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system introduces an intermediary element (multiplexer) that mediates between the two frequency synthesizers and the rest of the device. This intermediary component allows seamless switching between clock sources and enables spurious signal mitigation while maintaining a relatively simple overall structure, as the multiplexer is a standard off-the-shelf component.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Object-affected harmful factors

If iterative redesign and testing is performed to eliminate spurious signals, then spurious signals can be eliminated, but productivity decreases

Engineering Contradiction:
Improvespurious signalsVSAvoiddevice development productivity
Core Design Contradiction:
Object-affected harmful factorsVSProductivity

Solution Approach 1:

The system performs preliminary action by proactively generating multiple candidate clock signals before they are needed and pre-identifying spurious frequency components. The processor pre-analyzes potential spurious signals and prepares switching decisions in advance, eliminating the need for time-consuming iterative redesign and testing cycles, thereby significantly improving development productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes parameters by providing multiple clock signals with different frequencies (first clock signal at frequency f1, second clock signal at frequency f2) and dynamically switching between them based on spurious signal conditions. This allows the system to eliminate spurious signals by changing the operating frequency parameter rather than redesigning components, accelerating the development process and improving productivity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11573594B2Methods and apparatuses for providing a reference clock signal
Publication Date: 2023.02.07 U-BLOX
  • US11573594B2 patent drawing
  • US11573594B2 patent drawing
  • US11573594B2 patent drawing

AI summary

A method for providing a reference clock signal, comprising: generating, by an oscillator, a first clock signal having a first frequency, the first clock signal being coupled to a frequency synthesizer; generating, by the frequency synthesizer, a second clock signal based on the first clock signal, the second clock signal having a second frequency different from the first frequency; outputting a reference clock signal to one or more components of an electronic device, the reference clock signal being one of the first clock signal or the second clock signal; identifying one or more spurious frequency components; and monitoring the reference clock signal for a presence of the one or more spurious frequency components, the monitoring comprising: in response to determining the presence of at least one of the one or more spurious frequency components, selecting a different one of the first clock signal or the second clock signal to be the reference clock signal.