PLL Frequency Compensation Circuit for PVT Drift Stability

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Solution Overview

Problem

Phase-locked loops (PLLs) are susceptible to frequency shifts due to process, voltage, and temperature variations (PVT), leading to unlocking and destabilization of the output signal.

Innovation Solution

A frequency compensation circuit adjusts the control current in response to control voltage deviations, using a voltage monitor, frequency selector, phase generation circuit, and current bias circuit to maintain the output signal at a desired target frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the PLL operates without frequency compensation, then the circuit structure is simple, but the output frequency drifts due to PVT variations

Engineering Contradiction:
Improvecircuit structureVSAvoidfrequency stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements a frequency compensation circuit that continuously monitors the control voltage and adjusts the control current accordingly. When the control voltage deviates from the expected range due to PVT variations, the compensation circuit generates a corrective current to bring the output frequency back to the target value, creating a closed-loop feedback mechanism that maintains frequency stability

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The compensation circuit dynamically adjusts the control current parameter based on the detected control voltage level. By changing the control current in response to PVT-induced voltage deviations, the system compensates for frequency drift without requiring a complete redesign of the PLL architecture

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a frequency compensation circuit is added, then the frequency stability is improved, but the device complexity increases

Engineering Contradiction:
Improvefrequency stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The compensation circuit is divided into distinct functional modules: a control voltage detection unit that monitors the voltage level, a comparison unit that detects deviations from the expected range, and a current adjustment unit that generates the compensating current. This segmentation allows each module to perform its function independently while maintaining overall system simplicity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The compensation circuit is designed to detect control voltage deviations before they cause significant frequency drift. By taking preliminary action to adjust the control current when voltage deviations are first detected, the system prevents frequency instability rather than correcting it after it occurs, reducing the need for more complex correction mechanisms

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4625822A1Phase-locked loop circuit
Publication Date: 2025.10.01 MEDIATEK SINGAPORE PTE LTD
  • EP4625822A1 patent drawingFigure 1
  • EP4625822A1 patent drawingFigure 2
  • EP4625822A1 patent drawingFigure 3

AI summary

A PLL circuit generates an output signal having an output frequency and includes a voltage-to-current conversion circuit, a frequency compensation circuit, and an ICO. The voltage-to-current conversion circuit is configured to generate a first control current according to a control voltage, wherein the control voltage is generated according to a reference signal and a feedback signal derived from the output signal. The frequency compensation circuit is configured to generate a second control current according to the control voltage. The ICO generates the output signal according to an oscillation current, wherein the oscillation current is a sum of the first control current and the second control current. In response to the frequency compensation circuit detecting that the control voltage is out of a predetermined range, the second control current is controlled to be negatively correlated with the output frequency.