Time-to-Digital Voltage Drop Detection for PLL Frequency Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic devices face challenges in accurately detecting voltage changes, particularly voltage drops, due to limited control over supply voltage variations, which can lead to processor failure and instability in digital blocks.
Innovation Solution
A circuit utilizing a supply insensitive pulse generator and a time-to-digital converter (TDC) generates a digital signal from a pulse signal and voltage, allowing a controller to detect voltage changes and adjust the clock frequency of a phase-locked loop (PLL) only in response to voltage drops, while ignoring voltage overshoots, ensuring stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional voltage detection circuit is used, then the circuit can detect voltage changes, but it cannot accurately distinguish between voltage drops and voltage overshoots, leading to improper frequency adjustment
Solution Approach 1:
The voltage detection function is segmented into distinct components: a supply insensitive pulse generator that creates standardized pulses, a time-to-digital converter that measures pulse timing, and a controller that interprets the measurements. This segmentation allows each component to specialize in one aspect of voltage detection, improving overall precision without proportionally increasing complexity.
Solution Approach 2:
A time-to-digital converter is introduced as an intermediary between the voltage source and the control logic. This intermediary converts analog voltage timing information into digital signals that can be precisely measured and interpreted, enabling accurate distinction between voltage drops and overshoots while maintaining manageable circuit complexity.
2Reliability
If the controller adjusts frequency in response to all voltage changes, then frequency stability is improved, but processor failure may occur due to inappropriate frequency increases during voltage overshoots
Solution Approach 1:
Instead of responding to all voltage changes, the controller is designed to respond only to voltage drops by detecting the absence or延长的 of expected voltage pulses. This inverted approach—detecting what is missing rather than what is present—allows the system to maintain frequency stability during normal operation while avoiding dangerous frequency increases during voltage overshoots.
Solution Approach 2:
The controller continuously monitors the timing of pulses from the supply insensitive pulse generator and adjusts frequency based on this feedback. The feedback mechanism is designed to trigger frequency reduction only when pulse timing indicates a voltage drop, while ignoring timing variations caused by voltage overshoots, thus maintaining reliable processor operation with simple control logic.
3Ease of manufacture
If a supply-sensitive pulse generator is used, then the circuit design is simpler, but the pulse signal width varies with supply voltage, leading to inaccurate voltage detection
Solution Approach 1:
The pulse generator is designed to change its operating parameters dynamically to compensate for supply voltage variations. By adjusting the pulse generation timing and width based on the actual supply voltage conditions, the generator maintains consistent pulse characteristics despite voltage fluctuations, enabling accurate voltage detection without requiring complex additional circuitry.
Data Source
AI summary
A circuit for detecting a voltage change is described. The circuit includes a supply insensitive pulse generator that generates a pulse signal. The circuit also includes a time-to-digital converter coupled to the supply insensitive pulse generator. The time-to-digital converter generates a digital signal based on the pulse signal and a voltage. The circuit also includes a controller coupled to the time-to-digital converter that detects a voltage change based on the digital signal.