Statistical Reference Oscillator for Accurate Frequency Locking
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Solution Overview
Problem
Existing wired communication systems face challenges in manufacturing complex logic blocks for high-speed communication, leading to high power consumption and inaccurate frequency locking due to process voltage and temperature variations, and reliance on external reference clocks.
Innovation Solution
A statistical reference oscillator is introduced, comprising a stochastic reference clock generator, frequency divider, frequency detector, and output signal generator, which uses multiple threshold slicing and frequency division to produce a reference signal, reducing the need for external oscillators and improving frequency locking accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an external reference clock such as a crystal oscillator is used in the frequency acquisition loop, then frequency locking accuracy is improved, but cost and electric power consumption increase
Solution Approach 1:
The system generates its own reference clock signal internally using a pseudo-random sequence generator and delay locked loop, eliminating the need for external crystal oscillators. The frequency reference is derived from the input data signal itself through statistical analysis, allowing the system to be self-sufficient and avoid external power-consuming components.
Solution Approach 2:
The invention extracts the frequency reference information directly from the input data signal by analyzing transition patterns and timing statistics, rather than relying on separate external reference clock sources. This extraction approach removes the need for additional external components and reduces overall system power consumption.
2Speed
If complex logic blocks are manufactured for high-speed communication, then communication speed is improved, but manufacturing difficulty and power consumption increase
Solution Approach 1:
The frequency detection function is divided into multiple independent statistical analysis modules that process different aspects of the input signal separately. Each module performs simple counting and timing operations on segmented portions of the data, avoiding the need for a single complex high-speed logic block while achieving the same overall functionality at lower speeds.
Solution Approach 2:
The invention replaces complex high-speed digital logic processing with statistical analysis methods that operate at lower speeds. Instead of using fast switching logic blocks to detect frequency, the system uses statistical patterns in transition timing that can be processed by simpler, slower logic, reducing manufacturing complexity while maintaining accuracy.
3Adaptability or versatility
If process voltage and temperature variations occur, then device adaptability is improved, but frequency locking accuracy deteriorates
Solution Approach 1:
The system continuously monitors the statistical properties of the input signal and adjusts its frequency detection parameters based on observed patterns. The delay locked loop provides feedback that compensates for environmental variations by dynamically adjusting delay settings to maintain accurate frequency locking despite PVT changes.
Solution Approach 2:
The invention changes the detection parameters adaptively based on the input signal characteristics and environmental conditions. By adjusting the statistical analysis windows, threshold levels, and delay settings according to observed signal patterns, the system maintains frequency locking accuracy across varying process, voltage, and temperature conditions.
Data Source
AI summary
Disclosed is a statistical reference oscillator that includes: a stochastic reference clock generator which receives an input data outputs a reference signal obtained by dividing the received input data at a first frequency division ratio; a frequency divider which divides the frequency of an output signal at a second frequency division ratio and outputs a feedback signal; a frequency detector which outputs a difference signal based on a difference between the reference signal and the feedback signal; and an output signal generator which outputs the output signal based on the difference signal.