Input Matching Network Harmonic Trap for Compact Frequency Multipliers
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Solution Overview
Problem
Existing frequency multipliers face challenges in suppressing leakage current, particularly at even harmonics, which leads to low output power and conversion gain, and require large circuit areas due to conventional second harmonic traps.
Innovation Solution
Incorporating a λ/4 transmission line as a frequency trap in the input matching network to present a short circuit impedance at even harmonics, reducing the need for additional components and minimizing circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If conventional second harmonic traps are used, then leakage current suppression is improved, but circuit area increases
Solution Approach 1:
The input matching network is combined with the second harmonic trap function into a single integrated structure. The transmission line is configured to simultaneously provide impedance matching at the fundamental frequency and present a short circuit impedance at the second harmonic frequency, eliminating the need for separate trap components and reducing overall circuit area.
Solution Approach 2:
The transmission line in the input matching network is designed to perform multiple functions: it provides impedance matching for the fundamental frequency signal while simultaneously acting as a harmonic trap by presenting a short circuit impedance at even harmonics. This multi-functionality eliminates the need for dedicated trap components.
2Power
If conventional frequency multiplier designs are used, then frequency multiplication is achieved, but output power and conversion gain are reduced due to leakage current
Solution Approach 1:
The transmission line's inherent impedance characteristics are utilized to convert the potential harm of leakage current into a beneficial effect. By configuring the transmission line to present a short circuit impedance at even harmonics, the design actively suppresses leakage current while simultaneously improving output power and conversion gain.
3Object-generated harmful factors
If additional components are added for harmonic suppression, then leakage current suppression is improved, but device complexity increases
Solution Approach 1:
The harmonic suppression function is merged into the existing input matching network structure. The transmission line is designed to inherently provide both impedance matching and harmonic trapping functions, eliminating the need for additional separate components and maintaining device simplicity.
Solution Approach 2:
The input matching network is designed as a universal structure that simultaneously performs impedance matching and harmonic suppression. The transmission line configuration enables the same component to serve multiple purposes, reducing the total number of components required in the frequency multiplier circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances output power and conversion gain while significantly reducing circuit area, improving efficiency and performance of frequency multipliers, especially at higher frequencies.
Implementation Method 1
The transmission line is configured to provide a frequency trap for an even harmonic of the radio frequency input signal
Implementation Method 2
The transmission line is configured to present a short circuit impedance at the even harmonic of the radio frequency input signal
Implementation Method 3
The transmission line can present a shunt inductance to ground at a frequency of the radio frequency input signal
Data Source
AI summary
Aspects of this disclosure relate to a frequency multiplier with a transmission line in an input matching network. The frequency multiplier can multiply a frequency of a radio frequency input signal. The transmission line can provide a second harmonic trap. The transmission line can be electrically connected between input terminals of a pair of balanced transistors of the frequency multiplier.