Clock Divider Frequency Hopping Without Timing Relocking
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Solution Overview
Problem
Existing clock circuits struggle with efficient frequency hopping without the need for relocking timing and phase, especially in integrated circuits requiring spread spectrum and frequency hopping functions.
Innovation Solution
A clock circuit incorporating a frequency divider and frequency hopping circuit that stabilizes frequency transitions by stepwise changing the divisor number, allowing frequency hopping without relocking timing or phase, utilizing a sigma delta modulator and multiplexers to manage divisor number updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the frequency divider directly changes the divisor number to achieve frequency hopping, then the frequency hopping speed is improved, but frequency overshoot and timing relocking occur
Solution Approach 1:
The frequency hopping circuit performs preliminary calculations before changing the divisor number. It calculates a first divisor number based on a first frequency and a second divisor number based on a second frequency, then determines a second divisor number by combining the first and third divisor numbers. This preliminary calculation ensures smooth frequency transitions without overshoot or relocking.
Solution Approach 2:
The system dynamically adjusts the divisor number through a multi-step process. The frequency hopping circuit iteratively updates the divisor number from a first value to a second value based on convergence conditions. This dynamic adjustment allows the system to adapt the frequency division ratio in real-time while maintaining stability during transitions.
2Device complexity
If the frequency divider uses a fixed divisor number, then the circuit complexity is reduced, but the frequency hopping function cannot be implemented
Solution Approach 1:
The frequency hopping circuit is segmented into multiple functional modules: a frequency hopping control unit that generates control signals, a divisor number calculation unit that computes divisor values, and a frequency divider that performs the actual division. This segmentation allows the system to implement frequency hopping while keeping each module relatively simple and manageable.
Solution Approach 2:
The frequency hopping circuit serves multiple functions: it can hop between different frequency bands, implement spread spectrum modulation, and maintain timing synchronization. By integrating these functions into a single circuit block that works with the existing frequency divider, the system achieves versatility without proportionally increasing complexity.
3Productivity
If the frequency divider performs frequent divisor number updates, then the frequency hopping responsiveness is improved, but timing and phase relocking are required
Solution Approach 1:
The frequency hopping circuit uses feedback from the frequency divider's current state to determine the next divisor number. The circuit monitors the current frequency and divisor number, then calculates the appropriate next divisor number to achieve the target frequency. This feedback mechanism ensures that frequency transitions are smooth and maintain timing synchronization without requiring relocking.
Solution Approach 2:
Before updating the divisor number, the frequency hopping circuit performs preliminary calculations to determine the optimal transition path. It calculates intermediate divisor numbers and predicts the timing implications of each transition, allowing it to select update timings that maintain phase and timing synchronization. This preliminary action prevents the need for relocking after frequency changes.
Data Source
AI summary
The present disclosure provides a clock circuit and related method improving frequency hopping. The clock circuit may comprise a frequency divider and a frequency hopping circuit. The frequency divider may perform a frequency division according to a first divisor number. When hopping to a frequency or a spread spectrum range which is corresponding to an input number, if a convergence condition is not satisfied, the frequency hopping circuit may perform a stepping operation to update the first divisor number from a previous value to a current value which may not equal the input number.