PLL Phase Tracking With 1-Bit Sampling for MIMO Drift Correction
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Solution Overview
Problem
Existing wireless communication systems face challenges in managing low-frequency phase drift, particularly in large MIMO systems, which can lead to degraded performance due to temperature-based phase changes and device aging, affecting phase alignment between antenna elements.
Innovation Solution
Analog samplers with 1-bit quantization and digital phase computation circuits are used to track and correct low-frequency phase drift by sampling the phase-locked loop output signal, applying phase corrections when the phase is out of range, and integrating delta sigma modulation for precise adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase alignment is maintained in large MIMO systems, then system performance is improved, but phase drift due to temperature changes and device aging degrades performance
Solution Approach 1:
The patent implements a feedback mechanism where phase error is detected by sampling the phase-locked loop output signal, processed through digital phase computation circuits, and used to generate correction signals that adjust the phase alignment. This closed-loop feedback system continuously compensates for temperature-based phase changes and device aging, maintaining reliable phase alignment in large MIMO systems
Solution Approach 2:
The patent changes the parameter being monitored from raw phase signal to quantized phase error values through 1-bit sampling and digital processing. By transforming the phase detection into discrete phase error measurements and applying digital correction, the system can effectively track and compensate for slow phase drift caused by temperature variations and aging without being affected by high-frequency noise
2Measurement precision
If phase correction is applied continuously, then phase accuracy is improved, but transient phase noise causes conflicts and degradation
Solution Approach 1:
The patent employs periodic action by using an analog 1-bit sampler that samples the phase-locked loop output signal at specific intervals determined by a phase sampling clock. This periodic sampling approach allows phase error to be measured at discrete time points, enabling correction without continuous intervention that would amplify transient phase noise. The system achieves sub-1 degree phase accuracy through this periodic measurement and correction mechanism
Solution Approach 2:
The patent introduces digital phase computation circuits as an intermediary between the analog phase signal and the correction mechanism. The 1-bit quantization and digital processing act as a mediator that filters out transient phase noise while preserving the underlying phase drift trend. This intermediary processing stage converts the analog phase signal into digital phase error values, enabling noise-resistant phase correction
3Reliability
If complex phase tracking systems are implemented, then phase drift correction is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex analog phase tracking mechanisms with a simplified digital system. Instead of using sophisticated analog circuits to track and correct phase drift, the invention uses an analog 1-bit sampler combined with digital phase computation circuits. This substitution of mechanical/analog complexity with digital processing simplifies the overall system architecture while maintaining effective phase drift correction capability
Solution Approach 2:
The patent changes the parameter representation from continuous analog phase signals to discrete 1-bit quantized values. By converting the phase information into binary samples and processing them through digital logic, the system achieves phase tracking with reduced hardware complexity. The digital phase computation circuits operate on simple binary inputs to generate correction signals, avoiding the need for complex analog computation circuits
Data Source
AI summary
Aspects described herein include devices and methods for phase tracking and correction using sampling. One aspect includes a wireless communication apparatus having an analog 1-bit sampler configured to sample a phase locked loop (PLL) output signal using a PLL reference clock to generate 1-bit samples and a digital phase computation and control circuit configured to receive the 1-bit samples from the analog 1-bit sampler and apply phase corrections to the PLL based on a phase error derived from the 1-bit samples.