Multi-Gear VCO Circuit for Bandwidth and Phase Noise Trade-Off

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Solution Overview

Problem

Existing voltage-controlled oscillator (VCO) circuitry faces challenges in achieving high bandwidth, low phase noise, low power consumption, and reduced circuit area, particularly in transceiver applications where traditional designs often result in narrow frequency range, high power consumption, and large circuit area.

Innovation Solution

A circuit design featuring a pair of transistors coupled between high and low voltage sources, with a third transistor affecting the output clock signal, and VCO cells in a loop configuration, allowing operation in multiple 'gears' to adjust bandwidth and phase noise characteristics, and utilizing voltage regulator and control circuitry to manage noise and power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If LC-tank VCO architecture is used, then phase noise is reduced, but frequency range becomes narrow and circuit area increases

Engineering Contradiction:
Improvephase noiseVSAvoidfrequency range
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The VCO circuit is divided into multiple independently controllable VCO cells (first VCO cell, second VCO cell, third VCO cell) that can be selectively activated. Each cell contributes to the overall frequency range, allowing the circuit to achieve a wide frequency range while maintaining low phase noise by using multiple smaller oscillating units rather than a single large LC-tank.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit dynamically switches between different VCO cells based on the required frequency range. Control circuitry selectively enables or disables specific VCO cells to optimize performance for different operating conditions, allowing the system to adapt between wide frequency range mode and low phase noise mode as needed.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If LC-tank VCO architecture is used, then phase noise is reduced, but power consumption increases

Engineering Contradiction:
Improvephase noiseVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The total power consumption is distributed across multiple VCO cells that are not all active simultaneously. By segmenting the oscillating function across several cells and activating only the necessary subset for each operating condition, the circuit achieves low phase noise when needed while reducing overall power consumption through selective operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit uses partial action by activating only the minimum necessary VCO cells required to achieve the desired frequency range and phase noise performance. Rather than running all VCO cells continuously, the control circuitry enables only the subset needed for current operating conditions, reducing power consumption while maintaining performance.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If LC-tank VCO architecture is used, then phase noise is reduced, but circuit area increases

Engineering Contradiction:
Improvephase noiseVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The VCO function is segmented into multiple compact cells that can be arranged in a space-efficient manner. By dividing the oscillating function across several smaller cells rather than using a single large LC-tank, the circuit achieves low phase noise performance while occupying less total circuit area through more efficient spatial utilization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each VCO cell is designed to be multi-functional, capable of operating across different frequency ranges and contributing to both wide frequency range coverage and low phase noise performance. This universality allows the same cell structure to serve multiple purposes, reducing the need for separate dedicated circuits and thereby reducing overall circuit area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If high bandwidth is achieved, then frequency variation range increases, but phase noise increases

Engineering Contradiction:
Improvefrequency variation rangeVSAvoidphase noise
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The circuit dynamically adjusts which VCO cells are active based on the required operating frequency and bandwidth. By selectively enabling specific VCO cells for different frequency ranges, the system can achieve high bandwidth when needed while maintaining low phase noise by using the optimal subset of cells for each operating condition.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes operational parameters by switching between different VCO cell configurations. Each VCO cell is designed with specific frequency ranges and phase noise characteristics, and the control circuitry adjusts which cells are active to optimize the trade-off between bandwidth and phase noise based on current operational requirements.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8120429B1Voltage-controlled oscillator methods and apparatus
Publication Date: 2012.02.21 TAHOE RES LTD
  • US8120429B1 patent drawing
  • US8120429B1 patent drawing
  • US8120429B1 patent drawing

AI summary

Methods and apparatus are provided for generating a clock signal with relatively high bandwidth and relatively low phase noise. A circuit of the invention can include a pair of transistors serially coupled between a signal of relatively high voltage and a source of relatively low voltage, where a voltage of the signal of relatively high voltage can vary according to a voltage of a variable control signal. A gate of one of the pair of transistors can be coupled to an input clock signal, and an output node between the pair of transistors can be coupled to an output clock signal. The circuit can also include a third transistor, whose drain and source are coupled to the output clock signal, and whose gate can be coupled to a gear input signal. This circuit can advantageously operate under at least two different gears, each with different bandwidth and phase noise characteristics.