RTC Clock Generator Jitter Compensation With Delta-Sigma Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing ultra-low power (ULP) real-time clock (RTC) generators using MEMS resonators face challenges in reducing jitter and maintaining low power consumption while minimizing area occupation and cost, particularly due to the high consumption and large size of existing temperature-compensation solutions.
Innovation Solution
The proposed solution involves a clock generator that compensates for jitter by regulating the phase of switching edges using a delta-sigma modulation block to generate a control signal, which includes information on quantization error, allowing for deterministic jitter compensation without altering the frequency, and utilizes a sequence of delays to adjust the division modulus, thereby reducing power consumption and component size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If temperature-compensation circuits are added to reduce frequency variation, then frequency stability is improved, but power consumption and area occupation increase
Solution Approach 1:
The patent extracts only the essential jitter-compensation function from traditional temperature-compensation circuits. By using a delta-sigma modulation block to generate a control signal based on quantization error, the system achieves frequency stability without the power-consuming and area-intensive traditional temperature-compensation circuitry. The control signal is applied selectively to adjust the division modulus only when jitter occurs, rather than continuously compensating for all temperature variations.
Solution Approach 2:
The patent implements feedback through the delta-sigma modulation block that continuously monitors quantization error and generates a control signal in response. This feedback mechanism allows the system to automatically adjust the division modulus to compensate for jitter caused by temperature variations, maintaining frequency stability while consuming minimal power compared to continuous temperature-compensation approaches.
2Stability of the object's composition
If jitter compensation is implemented using traditional methods, then frequency stability is improved, but device area and cost increase
Solution Approach 1:
The patent extracts only the essential jitter-compensation function from traditional temperature-compensation circuits. By using a delta-sigma modulation block to generate a control signal based on quantization error, the system achieves frequency stability without the power-consuming and area-intensive traditional temperature-compensation circuitry. The control signal is applied selectively to adjust the division modulus only when jitter occurs, rather than continuously compensating for all temperature variations.
Solution Approach 2:
The patent changes the division modulus parameter dynamically based on the control signal generated by the delta-sigma modulation block. Instead of using complex temperature-compensation circuits, the system adjusts the division ratio (N or N+1) to compensate for jitter. This parameter change approach achieves frequency stability with minimal additional circuitry, significantly reducing device area compared to traditional methods.
3Stability of the object's composition
If continuous temperature compensation is used, then frequency stability is improved, but power consumption increases
Solution Approach 1:
The patent uses periodic action through the delta-sigma modulation block that operates at a specific modulation frequency to generate the control signal. Rather than continuous temperature compensation, the system periodically adjusts the division modulus based on quantization error samples taken at the modulation frequency. This periodic adjustment achieves frequency stability while consuming significantly less power than continuous compensation methods.
Solution Approach 2:
The patent implements feedback through the delta-sigma modulation block that continuously monitors quantization error and generates a control signal in response. This feedback mechanism allows the system to automatically adjust the division modulus to compensate for jitter caused by temperature variations, maintaining frequency stability while consuming minimal power compared to continuous temperature-compensation approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves low jitter and low power consumption with reduced area requirements, making it suitable for portable devices, while maintaining high stability across varying temperatures.
Implementation Method 1
resonant micromechanical structure, which, as a result of external stresses (including appropriate DC electrical biasing and AC driving signals), are induced to vibrate at a natural resonance frequency thereof
Implementation Method 2
a delta-sigma modulation block to generate a control signal, which includes information on quantization error, allowing for deterministic jitter compensation
Implementation Method 3
utilizes a sequence of delays to adjust the division modulus, thereby reducing power consumption and component size
Data Source
AI summary
In an embodiment, a clock generator has a variable-modulus frequency divider that receives a high-frequency clock signal and outputs a divided clock signal having a frequency controlled by a modulus-control signal generated by a temperature-compensation circuit. A jitter filter is coupled to the output of the variable-modulus frequency divider and to the temperature-compensation circuit and generates a compensated clock signal having switching edges that are delayed, with respect to the divided clock signal, by a time correlated to a quantization-error signal.