Level Shift Circuit with Bootstrap Compensation for Stable Waveforms
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Solution Overview
Problem
Circuits structured with single-channel MOS transistors are prone to waveform distortion due to floating nodes, leading to potential malfunctions and errors, especially when receiving signals from circuits with unstable waveforms, which can cause power consumption issues and operational instability.
Innovation Solution
A level shift circuit is designed with a combination of transistors and capacitive elements that include a bootstrap circuit and voltage compensation circuits to ensure proper waveform shaping, using transistors driven by input pulse signals to maintain output voltage stability and compensate for parasitic capacitance-induced fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If circuits are structured with single-channel MOS transistors, then power consumption is reduced, but waveform distortion occurs due to floating nodes
Solution Approach 1:
The patent introduces a level shift circuit as an intermediary component between the single-channel MOS transistor circuit and the external signal source. This level shift circuit includes a bootstrap circuit and voltage compensation circuit that actively manage the floating node voltages, preventing waveform distortion while allowing the main circuit to maintain its low power consumption characteristics.
Solution Approach 2:
The voltage compensation circuit performs preliminary anti-action by detecting voltage fluctuations caused by parasitic capacitance discharge and applying compensating voltages in advance. The compensation voltage is generated opposite to the direction of the voltage fluctuation, preventing waveform distortion before it can propagate through the circuit.
2Device complexity
If single-channel MOS transistors are used, then device complexity is reduced, but floating nodes cause susceptibility to noise and signal distortion
Solution Approach 1:
The level shift circuit serves as a protective intermediary that isolates the simple single-channel MOS transistor circuit from external noise. By actively controlling the floating node voltages through the bootstrap and voltage compensation circuits, external noise signals cannot propagate into the circuit and cause distortion.
Solution Approach 2:
The bootstrap circuit provides beforehand cushioning by pre-charging the floating nodes to appropriate voltage levels before signals are applied. This pre-positioning of voltages creates a stable baseline that resists noise interference and prevents the floating nodes from becoming susceptible to external signals.
3Use of energy by moving object
If floating nodes are present in single-channel MOS circuits, then power consumption is lowered, but voltage fluctuations occur due to parasitic capacitance discharge
Solution Approach 1:
The voltage compensation circuit implements feedback by continuously monitoring the voltage at floating nodes and detecting fluctuations caused by parasitic capacitance discharge. When voltage fluctuations are detected, the compensation circuit generates corrective voltages that feed back to the floating nodes, stabilizing the voltage levels while maintaining the low power consumption operation.
Solution Approach 2:
The compensation circuit performs preliminary anti-action by generating voltages in opposition to the expected voltage fluctuations from parasitic capacitance discharge. By anticipating and counteracting these fluctuations before they significantly impact the circuit operation, the system maintains voltage stability without increasing power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves stable, well-shaped internal and output waveforms, reducing the risk of malfunctions and errors while maintaining low power consumption by effectively managing voltage fluctuations and ensuring proper transistor operation.
Implementation Method 1
a capacitive element having a first terminal to which a third input signal synchronized with the first input signal is supplied, and a second terminal connected to both the output terminal of the first input transistor and the output terminal of the third input transistor
Data Source
AI summary
A level shift circuit includes: a first and a second output transistor outputting voltages derived from a first and a second power source voltage, respectively; a first and a second input transistor outputting, based on a first input pulse signal, a first voltage for turning ON the first output transistor and a second voltage for turning OFF the second output transistor, respectively; a third and a fourth input transistor outputting, based on a second input pulse signal, a third voltage for turning OFF the first output transistor and a fourth voltage for turning ON the second output transistor, respectively; a first bootstrap circuit enlarging an amplitude of the first voltage and supplying the same to the first output transistor; and a first voltage compensation circuit, based on a third input pulse signal, making, at an end timing of the first input pulse signal, a voltage change in a direction opposite to that of a voltage fluctuation caused in the first voltage due to a parasitic capacitance in the first input transistor.