Signal Level Translator Using Input-Powered Voltage Extraction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing level shifter circuits in the semiconductor industry face issues such as requiring dual power supplies, sinking current from the input signal, and causing power dissipation, which increases costs and degrades signal quality.
Innovation Solution
A signal level translator circuit that extracts a power supply voltage from the input signal to operate, using a digital inverter configuration with a capacitor and control switches to translate voltage levels without dual power supplies, minimizing current sunk and power dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dual power supplies are used to translate voltage levels, then voltage level translation is achieved, but circuit cost increases
Solution Approach 1:
The patent extracts the power supply voltage directly from the input signal itself, rather than requiring external dual power supplies. The circuit captures the voltage level from the incoming signal and uses it to drive the output, eliminating the need for separate power supply circuits and reducing overall device complexity while maintaining voltage translation capability
Solution Approach 2:
The input signal serves multiple functions simultaneously: it carries both the data information and the power supply voltage needed to drive the output circuit. This multi-functionality eliminates the need for dedicated power supply circuits, reducing device complexity while preserving the voltage level translation function
2Reliability
If current is sunk from the input signal to achieve level shifting, then voltage level translation is achieved, but input signal quality degrades
Solution Approach 1:
The patent introduces a capacitor as an intermediary energy storage element that captures the power supply voltage from the input signal without continuously sinking current. The capacitor charges during high voltage periods and discharges during low voltage periods, providing the necessary drive voltage to the output while minimizing current extraction from the input signal, thus preserving signal quality
Solution Approach 2:
The circuit operates by periodically charging the capacitor during high voltage periods and discharging it during low voltage periods. This periodic action allows the output to be driven by stored energy rather than continuous current sinking from the input signal, reducing signal degradation while maintaining voltage level translation capability
3Ease of operation
If dc current is consumed during standby mode to maintain circuit operation, then circuit readiness is maintained, but power dissipation increases
Solution Approach 1:
The circuit uses periodic charging of the capacitor during active periods and maintains output readiness through the stored charge without requiring continuous DC current flow. During standby, the capacitor retains sufficient charge to maintain circuit readiness, eliminating continuous power dissipation while preserving the ability to quickly respond to incoming signals
Solution Approach 2:
The capacitor serves itself by maintaining its charge during standby periods without requiring external power supply current. The stored energy in the capacitor provides the necessary voltage to maintain circuit readiness and drive the output, allowing the circuit to operate with minimal power consumption during idle periods
Data Source
AI summary
In one embodiment, a first portion (20) of translator circuit (17) is configured to extract a first supply voltage level from a high level of an input signal, an inverter (25) is configured to operate from the first supply-voltage level and a second portion (30) of the translator circuit is configured to operate from a second supply voltage level (V2) that is greater than the first supply voltage level.