Master-Slave Flip-Flop Fault Injection Detection Circuit
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Solution Overview
Problem
Electronic circuits with synchronous flip-flops face challenges in detecting incidental or intentional disturbances, such as voltage peaks or laser pulses, which can affect data reliability, especially in critical data processing applications like encryption or secret data manipulation.
Innovation Solution
A method is introduced for detecting disturbances in master-slave synchronous flip-flops by using two bistable circuits triggered by distinct signals, with a logic circuit comparing input and output states at an intermediary point to generate signals indicating potential disturbances, and controlling the bistable circuits through cyclic periods to detect dynamic and static effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard synchronous flip-flops are used without additional detection circuits, then the circuit complexity is low, but the reliability against fault injections is insufficient
Solution Approach 1:
The detection functionality is nested within the existing master-slave flip-flop structure by utilizing the intermediary junction point between the two bistable circuits. The comparison logic is integrated into the flip-flop's internal architecture, allowing disturbance detection without adding completely separate detection circuits.
Solution Approach 2:
An intermediary comparison circuit is introduced that monitors the junction point between master and slave bistable circuits. This intermediary element compares the intermediate signal with expected values to detect disturbances, acting as a mediator between the flip-flop's internal state and the detection output.
2Measurement precision
If continuous monitoring of all flip-flops is implemented, then the detection precision is high, but the energy consumption increases
Solution Approach 1:
The detection mechanism operates periodically by utilizing the natural clock cycles of the master-slave flip-flop. The comparison of the intermediary junction point occurs at specific phases of the clock signal, enabling disturbance detection without continuous monitoring, thus reducing energy consumption while maintaining detection precision.
3Reliability
If the protection mechanism is activated for all periods, then the reliability is maximized, but the productivity decreases
Solution Approach 1:
The protection mechanism is activated periodically during critical phases of the clock cycle rather than continuously. The detection occurs during specific periods when data stability is critical, allowing full reliability during protection periods while maintaining high processing speed during non-protection periods.
Solution Approach 2:
The protection mechanism dynamically adjusts its activation based on the operational phase of the flip-flop. The detection circuit is enabled during critical transition periods and disabled during stable state periods, optimizing the balance between reliability and processing throughput.
Data Source
AI summary
A method for detecting a disturbance of the state of a synchronous flip-flop of master-slave type including two bistable circuits in series, in which the bistable circuits are triggered by two first signals different from each other, and the level of an intermediary junction point between the two bistable circuits is compared both to the level present at the input of the master-slave flip-flop and to the level present at the output, which results in two second signals providing an indication as to the presence of a possible disturbance.