Frequency-Locked VCO Loop Without an Off-Chip Crystal Reference
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Solution Overview
Problem
Existing integrated circuit chips require an off-chip reference component, such as a crystal oscillator, which can be a security vulnerability and unnecessary for precise frequency generation, and there is a need for a frequency-locked loop that operates without external reference signal circuitry.
Innovation Solution
An integrated circuit chip with a frequency-locked voltage regulated loop that includes a voltage-controlled oscillator (VCO), a frequency divider, a frequency-to-voltage converter (FVC), and an internal reference voltage, where the voltage regulator generates a control voltage based on the difference between the FVC output and the internal reference voltage to lock the VCO frequency, eliminating the need for an off-chip reference component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an off-chip reference component (crystal oscillator) is used, then frequency stability is improved, but device complexity and security vulnerabilities increase
Solution Approach 1:
The patent extracts and eliminates the off-chip crystal oscillator from the system, replacing it with an on-chip frequency-locked loop that generates stable frequencies using only integrated circuit components. This removes the external reference component while maintaining frequency stability through the FLL's feedback mechanism.
Solution Approach 2:
The frequency-locked loop circuit performs multiple functions: it generates stable clock frequencies, provides frequency multiplication/division, and ensures timing synchronization without requiring external components. The circuit serves as both the frequency source and the stability reference simultaneously.
2Reliability
If an off-chip reference component is used, then frequency stability is improved, but security is worsened
Solution Approach 1:
The patent removes the off-chip crystal oscillator that creates security vulnerabilities, replacing it with an on-chip frequency-locked loop. This eliminates the attack surface associated with external reference components while maintaining frequency stability through integrated feedback control.
3Reliability
If a phase-locked loop is used with external reference, then frequency generation is improved, but device complexity increases
Solution Approach 1:
Instead of using a traditional phase-locked loop that requires an external reference signal to lock onto, the patent inverts the approach by using a frequency-locked loop that generates its own reference frequencies through on-chip dividers and compares them against the VCO output. This reverses the dependency from external-to-internal reference.
Solution Approach 2:
The patent combines the reference signal generation, frequency comparison, and VCO control functions into a single integrated frequency-locked loop circuit on the chip. The frequency dividers, comparators, and voltage regulator are merged into one cohesive feedback system that eliminates external components.
4Measurement precision
If frequency division is performed, then frequency accuracy is improved, but timing signal complexity increases
Solution Approach 1:
The patent uses multiple frequency dividers with different division ratios (N and M) to create separate timing signals for different frequency comparison needs. This segmentation allows accurate frequency measurement through division while managing timing complexity by creating dedicated timing signals for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for a stable frequency generation without external reference components, enhancing security and reducing the complexity of the circuit while providing a stable frequency with less jitter, suitable for digital clock systems.
Implementation Method 1
a voltage-controlled oscillator (VCO) that outputs a VCO signal
Implementation Method 2
a frequency-to-voltage converter (FVC), connected to the frequency divider, that converts the frequency divided VCO signal into an output voltage
Implementation Method 3
the voltage regulator, also being connected to the frequency divider, the FVC and the VCO, generating a control voltage, VCOIN, that is fed back to the VCO in a 2nd timing period to lock a frequency of the VCO
Data Source
AI summary
An integrated circuit includes a frequency-locked voltage regulated loop that further includes a voltage controlled oscillator (VCO), a frequency divider that generates sequential timing signals based on a period of the VCO from a frequency divided VCO signal, a frequency-to-voltage converter (FVC) that converts the frequency divided VCO signal into an output voltage, FVCOUT, an internal reference voltage, and a voltage regulator that generates a control voltage, VCOIN, that is fed back to the VCO to lock a frequency of the VCO in the frequency-locked voltage regulated loop.