Clock Distribution Frequency Planning for Integer Boundary Spurs
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Solution Overview
Problem
Wideband clock distribution systems, especially those using integrated circuits, face challenges in reducing spurious emissions due to difficulties in shielding components, and existing solutions are complex or lack guidance on configuring clock distribution chips to predict and mitigate fractional spurious outputs.
Innovation Solution
A method involving a system controller that configures a clock distribution system with a master clock subsystem and fractional synthesizers to generate output signals, calculates expected spurious levels based on fractional offset values, and selects optimal operating frequencies to minimize spurious emissions by programming the subsystems accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If shielding of different components in the synthesizer is improved to reduce spurious emissions, then spurious emissions are reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies preliminary action by calculating and determining the locations of fractional spurious outputs before the clock distribution system operates. The system predicts where spurious emissions will occur based on operating parameters, and then proactively routes these signals to dedicated cancellation outputs before they can cause interference. This prevents the need for complex shielding structures that would be required if spurious emissions were addressed after generation or through physical barriers.
2Object-generated harmful factors
If complex spurious reduction methods such as spurious tone cancellation or dual DDS approaches are used, then spurious emissions are reduced, but device complexity increases
Solution Approach 1:
The patent extracts the harmful fractional spurious signals from the main clock distribution path by predicting their locations and routing them to dedicated cancellation outputs. This separation allows the main system to operate normally while the extracted spurious components are handled independently through simple attenuation or filtering at the cancellation outputs, avoiding the need for complex cancellation circuits or dual synthesizer architectures.
3Device complexity
If commercially available clock distribution chips are used without configuration guidance, then device complexity is reduced, but the ability to predict and mitigate fractional spurious outputs is lost
Solution Approach 1:
The patent implements feedback by continuously monitoring the operating parameters of the clock distribution system (such as division ratios and frequency settings) and using this information to calculate the locations of fractional spurious outputs. The system dynamically adjusts which outputs are designated as cancellation outputs based on the current operating conditions, ensuring that spurious emissions are always routed to appropriate cancellation paths regardless of how the system is configured.
Data Source
AI summary
A method for reducing spurious for a clock distribution system, the method including a) providing a system controller, b) providing clock distribution system, c) inputting characteristics of the clock distribution system in advance of operation thereof, d) calculating an expected level of the integer boundary spurious as a function of a fractional offset value, e) selecting an integer boundary solution based on the fractional offset value being within a preferred predetermined region, and f) programming the master clock subsystem and the one or more fractional synthesizers with the integer boundary solution, and g) repeating steps d) through f) as needed.