Switched-Oscillator Frequency Synthesis for High Multiplication Rank
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Solution Overview
Problem
Existing frequency synthesis devices struggle to achieve high multiplication orders while maintaining low energy consumption, as they require multiple frequency recovery circuits that increase energy consumption, making them unsuitable for mobile terminals with low autonomy.
Innovation Solution
A frequency synthesis device is designed with a base frequency generator producing non-overlapping clock signals that switch multiple identical oscillators, with their output signals combined to supply a second base signal, which then switches a single oscillator with a frequency discriminator circuit, eliminating the need for multiple frequency recovery circuits and reducing energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple frequency recovery circuits are used to achieve high multiplication orders, then the multiplication rank is improved, but the energy consumption increases
Solution Approach 1:
The patent merges multiple frequency recovery circuits into a single shared frequency recovery circuit that serves multiple oscillators. This is achieved by having multiple oscillators (first oscillator, second oscillator, etc.) all connect to the same frequency recovery circuit, which recovers the base frequency from their combined output signals. This consolidation maintains the ability to achieve high multiplication orders while significantly reducing energy consumption compared to having separate frequency recovery circuits for each oscillator.
2Productivity
If multiple frequency recovery circuits are used to achieve high multiplication orders, then the multiplication rank is improved, but the device complexity increases
Solution Approach 1:
The patent merges multiple frequency recovery circuits into a single shared frequency recovery circuit that serves multiple oscillators. This is achieved by having multiple oscillators (first oscillator, second oscillator, etc.) all connect to the same frequency recovery circuit, which recovers the base frequency from their combined output signals. This consolidation maintains the ability to achieve high multiplication orders while significantly reducing energy consumption compared to having separate frequency recovery circuits for each oscillator.
3Reliability
If the quality factor of the frequency discriminator circuit is increased to maintain low phase noise, then the phase noise is improved, but the device complexity and energy consumption increase
Solution Approach 1:
The patent segments the frequency synthesis function across multiple oscillators with different natural frequencies, where each oscillator targets a different harmonic. The frequency recovery circuit then selects and recovers only the fundamental base frequency from these multiple oscillator outputs. This segmentation allows the system to achieve high multiplication orders through the harmonics of multiple oscillators while keeping the quality factor requirements of individual frequency discriminator circuits lower, thus reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high multiplication orders with a simplified structure and reduced energy consumption, making it suitable for mobile terminals by eliminating the need for multiple frequency recovery circuits and relaxing the constraints on the quality factor of the frequency discriminator circuit.
Implementation Method 1
a first switching power supply oscillator of which the supply is switched by a first base signal, the output signal of this first oscillator being in the form of wave trains, the repetition frequency of which is equal to the frequency of the first base signal
Implementation Method 2
a frequency discriminator circuit adapted to filtering the output signal of the second oscillator to supply a sinusoidal signal at the frequency Mf2
Data Source
AI summary
A frequency synthesis device with high multiplication rank, including a base frequency generator generating two first base signals of square shape of same frequency and opposite to each other, a first synthesis stage including two first switching power supply oscillators, of which the power supplies are respectively switched by the two first base signals, a second synthesis stage including a second switching power supply oscillator of which the supply is switched by a combination of the output signals of the two first oscillators, the output of the second switching power supply oscillator being filtered by a frequency discriminator circuit realized with an injection locked oscillator.