Fractional-N PLL Spur Compensation Using Multiple Phase Frequencies

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Solution Overview

Problem

Conventional fractional-N PLLs face challenges with close-in primary spurs causing excessive phase noise and emission power in adjacent channels, particularly in high data rate wireless communication applications like 4G/LTE and WIMAX, due to insufficient attenuation of spurious sideband frequencies.

Innovation Solution

The implementation of a fractional spur compensation technique using multiple phase comparison frequencies, which involves a programmable phase comparison signal generator, a programmable reference frequency multiplier, and a programmable charge pump to adjust loop gain, ensuring an increased offset frequency between channel frequencies and their primary fractional spurs, thereby improving spur performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single phase comparison frequency is used in fractional-N PLL, then the circuit complexity is low, but the offset frequency between channel frequency and primary spur is small causing excessive phase noise

Engineering Contradiction:
Improvecircuit complexityVSAvoidphase noise
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the single phase comparison frequency into multiple discrete frequency options (e.g., first, second, third phase comparison frequencies). The fractional-N PLL can select from multiple predetermined divider ratios corresponding to these different frequencies, segmenting the frequency synthesis problem into manageable discrete choices that optimize spur performance for different operating conditions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic selection of phase comparison frequency based on the desired channel frequency. The system dynamically adjusts which phase comparison frequency to use depending on the operating channel, allowing the offset frequency to be optimized for each specific frequency band while maintaining overall system flexibility.

Inventive Principle:
Principle #15Dynamics

2Object-affected harmful factors

If loop bandwidth is narrowed to filter out close-in spurs, then spur attenuation is improved, but phase lock time increases

Engineering Contradiction:
Improvespur attenuationVSAvoidphase lock time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The patent applies preliminary anti-action by pre-selecting an appropriate phase comparison frequency that maximizes the offset frequency before the spurious signals even become a problem. By choosing the right phase comparison frequency from multiple options based on the desired channel frequency, the system proactively prevents close-in spurs from occurring in the first place, eliminating the need for aggressive loop filtering that would increase lock time.

Inventive Principle:
Principle #9Preliminary anti-action

3Measurement precision

If fractional division is implemented by switching between different integer divisors, then frequency synthesis resolution is improved, but spurious sideband frequencies are introduced

Engineering Contradiction:
Improvefrequency synthesis resolutionVSAvoidspurious sideband frequencies
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent changes the parameter of phase comparison frequency to optimize the spectral distribution of spurious signals. By selecting from multiple predetermined phase comparison frequencies based on the desired channel frequency, the system adjusts the frequency domain parameters to maximize the offset between spurs and desired signals, thereby improving spur performance while maintaining fractional frequency synthesis capability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8502575B2Fractional-N PLL using multiple phase comparison frequencies to improve spurious signal performance
Publication Date: 2013.08.06 TEXAS INSTRUMENTS INC
  • US8502575B2 patent drawing
  • US8502575B2 patent drawing
  • US8502575B2 patent drawing

AI summary

A fractional spur compensation technique is implemented in a fractional-N PLL using multiple phase comparison frequencies Fpd, one of which is selected for any channel frequency Fch in a target frequency band to obtain a selected offset frequency Fos between the channel frequency Fch and its primary fractional spur throughout the target frequency band. Other features of an exemplary implementation of the fractional spur compensation technique include (a) maintaining the phase comparison frequency at less than a predetermined maximum value, (b) using a programmable reference frequency multiplier with selectable multiplication factors and/or a programmable reference frequency divider with selectable divide ratios to generate multiple phase comparison frequencies derived from a predetermined reference frequency Fref, and (c) using a programmable charge pump to select different charge pump currents for respective phase comparison frequencies to reduce loop gain variation.