Asynchronous Lockstep Logic With Metastability Masked Comparison
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Solution Overview
Problem
Conventional lockstep systems are incompatible with asynchronous clock domains, leading to uncertainty in signal transitions and potential false errors due to metastable conditions, where signals may not transition in unison, causing mismatches that are mistakenly interpreted as faults.
Innovation Solution
The implementation of a metastable condition detection circuit and a mask circuit that generates a mismatch control signal and selectively masks it during metastable conditions, ensuring accurate signal comparison and error detection in asynchronous environments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lockstep systems are used to provide redundancy and detect faults, then system reliability is improved, but false errors occur in asynchronous environments due to metastable conditions
Solution Approach 1:
An intermediary metastable condition detection circuit is introduced between the asynchronous signal sources and the comparator. This circuit detects metastable conditions and generates a mask control signal that prevents the comparator from generating false mismatch signals during metastable periods, thereby resolving the contradiction between maintaining reliability through lockstep and avoiding false error detection in asynchronous environments
Solution Approach 2:
The metastable condition detection circuit performs preliminary detection of metastable states before the comparator can compare the signals. By detecting the metastable condition in advance and generating a mask control signal, the system prevents false error detection before it occurs, allowing lockstep redundancy to maintain its reliability function without suffering from false positives in asynchronous environments
2Adaptability or versatility
If signals are sampled asynchronously across clock domains, then adaptability is improved, but uncertainty in signal transitions occurs due to metastable conditions
Solution Approach 1:
The metastable condition detection circuit serves as an intermediary that monitors asynchronous signal transitions and identifies metastable states. This allows the system to maintain adaptability to asynchronous clock domains while compensating for the inherent uncertainty by detecting and masking metastable conditions before they cause unreliable signal transitions
3Difficulty of detecting and measuring
If redundant signals are compared to detect faults, then fault detection capability is improved, but false mismatches occur during metastable conditions
Solution Approach 1:
A metastable condition detection circuit is positioned as an intermediary between the redundant signal sources and the comparator. This circuit detects when signals are in metastable states and generates a mask control signal that prevents the comparator from interpreting metastable mismatches as actual faults, thereby maintaining fault detection capability while eliminating false positives
Solution Approach 2:
The system performs preliminary detection of metastable conditions before the comparison operation. By identifying metastable states in advance and generating mask control signals, the system prevents false mismatch detection, ensuring that only genuine faults are detected while maintaining high fault detection capability
Data Source
AI summary
Methods and systems to detect a metastable condition and suppress/mask a signal during the metastable condition. The metastable condition may arise from asynchronous sampling. Techniques disclosed herein may be configured to enable asynchronous lock-stepping, where outputs of redundant circuit blocks of a first clock domain are received at input nodes of a second clock domain. In the second clock domain, logic states at the input nodes are compared to detect errors, and results of the comparison are masked during transitions at the input nodes. Masking may be constrained to situations where logic states at the input nodes differ.