PLL Clock Hold Circuit for Interrupted NFC Carrier Waves
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Solution Overview
Problem
In noncontact communication systems, the disappearance of a carrier wave leads to the loss of a clock signal, causing communication operations to stop and reducing efficiency, especially when performing SWP communication in parallel with NFC communication.
Innovation Solution
A semiconductor device with a PLL circuit that maintains an internal clock signal frequency using a voltage-controlled oscillation function, even when the clock signal from the carrier wave is interrupted, allowing continuous data processing and parallel communication operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If ASK 100% modulation signal is used for noncontact communication, then communication capability is improved, but clock signal extraction becomes unreliable causing operation stop
Solution Approach 1:
The system performs preliminary detection of carrier wave disappearance before it affects internal operations. The detection circuit monitors the carrier wave continuously and triggers the clock stop determination in advance, allowing the system to prepare for clock interruption and maintain operational continuity through pre-planned clock signal generation.
Solution Approach 2:
An intermediary detection circuit and control mechanism are introduced between the carrier wave reception and the internal clock generation. This intermediary system detects carrier wave status and controls the clock signal generation accordingly, preventing direct disruption to internal operations when the carrier wave disappears during ASK 100% modulation.
2Stability of the object's composition
If internal operations are stopped when clock signal is lost, then synchronization is maintained, but communication efficiency deteriorates
Solution Approach 1:
The system dynamically adjusts clock signal generation based on real-time carrier wave detection status. When carrier wave disappearance is detected, the system transitions from external clock dependency to internal clock generation, and vice versa when carrier wave is restored. This dynamic adaptation maintains synchronization stability while preventing unnecessary operation stops that would reduce communication efficiency.
3Productivity
If SWP communication is performed in parallel with NFC communication, then communication efficiency is improved, but clock interruption causes both communications to stop
Solution Approach 1:
The system performs preliminary detection of carrier wave status changes that would affect clock signals. By detecting carrier wave disappearance before it interrupts communications, the system can switch to internal clock generation in advance, ensuring both SWP and NFC communications continue uninterrupted in parallel, thereby maintaining both communication efficiency and continuity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables uninterrupted communication operations and parallel SWP communication even when the clock signal is not extracted from the carrier wave, enhancing communication efficiency by preventing internal operations from stopping.
Implementation Method 1
a noncontact communication semiconductor device (also called NFC chip) uses its communication data and interfaces with another data processing circuit in parallel with noncontact communication by the noncontact communication semiconductor device
Implementation Method 2
a PLL circuit that receives the extracted clock signal and generates the internal clock signal
Implementation Method 3
the function makes the internal clock signal maintained at a frequency immediately before the interruption
Data Source
AI summary
The present invention provides a noncontact interface technique capable of performing communication operation without stopping an internal operation even when a clock signal cannot be extracted from a carrier wave. In a semiconductor device that receives a modulated carrier wave from an antenna, generates an internal clock signal on the basis of a clock signal extracted from the received carrier wave, and performs operation synchronously with the internal clock signal, a PLL circuit that receives the extracted clock signal and generates the internal clock signal is provided with a voltage control oscillation function. In the case where the clock signal extracted from the carrier wave is discretely interrupted, the function makes the internal clock signal maintained at a frequency immediately before the interruption. With the configuration, even when the clock signal extracted from the carrier wave is interrupted, internal data processes such as decoding and bus interfacing can be continued.